forked from OSchip/llvm-project
[LLD][ELF][ARM] Add test cases for R_ARM_THM_MOV*-type relocs
Summary: This patch adds missing tests cases for R_ARM_THM_MOVW/MOVT* relocations for the sake of completeness. Reviewers: peter.smith, MaskRay, espindola, psmith Reviewed By: MaskRay, psmith Subscribers: psmith, danielkiss, emaste, kristof.beyls, llvm-commits Tags: #llvm, #lld Differential Revision: https://reviews.llvm.org/D74827
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@ -11,6 +11,8 @@
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/// * R_ARM_MOVW_PREL_NC and R_ARM_MOVT_PREL
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/// * R_ARM_MOVW_BREL_NC and R_ARM_MOVT_BREL
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///
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/// * R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_ABS
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/// * R_ARM_THM_MOVW_PREL_NC and R_ARM_THM_MOVT_PREL
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/// * R_ARM_THM_MOVW_BREL_NC and R_ARM_THM_MOVT_BREL
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.syntax unified
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@ -131,6 +133,76 @@ _start:
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/// :upper16:label3.4 - SB = :upper16:0x10000 = 1
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// CHECK: movt r4, #1
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.section .R_ARM_THM_MOVW_ABS_NC, "ax",%progbits
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.align 8
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movw r0, :lower16:label
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movw r1, :lower16:label1
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movw r2, :lower16:label2 + 4
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movw r3, :lower16:label3
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movw r4, :lower16:label3 + 4
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// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVW_ABS_NC
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// CHECK-EMPTY:
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// CHECK: 12600: movw r0, #0
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// CHECK: movw r1, #4
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// CHECK: movw r2, #12
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// CHECK: movw r3, #65532
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// CHECK: movw r4, #0
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.section .R_ARM_THM_MOVT_ABS, "ax",%progbits
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.align 8
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movt r0, :upper16:label
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movt r1, :upper16:label1
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movt r2, :upper16:label2 + 4
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movt r3, :upper16:label3
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movt r4, :upper16:label3 + 4
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// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVT_ABS
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// CHECK-EMPTY:
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// CHECK: 12700: movt r0, #2
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// CHECK: movt r1, #2
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// CHECK: movt r2, #2
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// CHECK: movt r3, #2
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// CHECK: movt r4, #3
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.section .R_ARM_THM_MOVW_PREL_NC, "ax",%progbits
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.align 8
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movw r0, :lower16:label - .
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movw r1, :lower16:label1 - .
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movw r2, :lower16:label2 + 4 - .
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movw r3, :lower16:label3 - .
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movw r4, :lower16:label3 + 0x2814 - .
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// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVW_PREL_NC
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// CHECK-EMPTY:
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/// :lower16:label - . = 55296
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// CHECK: 12800: movw r0, #55296
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/// :lower16:label1 - . = 55296
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// CHECK: movw r1, #55296
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/// :lower16:label2 - . + 4 = 55300
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// CHECK: movw r2, #55300
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/// :lower16:label3 - . = 55280
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// CHECK: movw r3, #55280
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/// :lower16:label3 - . + 0x2814 = 0x20000
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// CHECK: movw r4, #0
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.section .R_ARM_THM_MOVT_PREL, "ax",%progbits
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.align 8
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movt r0, :upper16:label - .
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movt r1, :upper16:label1 - .
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movt r2, :upper16:label2 + 0x4 - .
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movt r3, :upper16:label3 - .
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movt r4, :upper16:label3 + 0x2914 - .
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// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVT_PREL
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// CHECK-EMPTY:
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/// :upper16:label - . = :upper16:0xd700 = 0
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// CHECK: 12900: movt r0, #0
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/// :upper16:label1 - . = :upper16:0xd700 = 0
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// CHECK: movt r1, #0
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/// :upper16:label2 - . + 4 = :upper16:0xd704 = 0
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// CHECK: movt r2, #0
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/// :upper16:label3 - . = :upper16:0x1d6f0 = 1
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// CHECK: movt r3, #1
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/// :upper16:label3 - . + 0x2914 = :upper16:0x20000 = 2
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// CHECK: movt r4, #2
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.section .R_ARM_THM_MOVW_BREL_NC, "ax",%progbits
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.align 8
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movw r0, :lower16:label(sbrel)
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@ -142,7 +214,7 @@ _start:
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// CHECK-EMPTY:
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// SB = .destination
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/// :lower16:label - SB = 0
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// CHECK: 12600: movw r0, #0
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// CHECK: 12a00: movw r0, #0
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/// :lower16:label1 - SB = 4
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// CHECK: movw r1, #4
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/// :lower16:label2 - SB = 8
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// CHECK-EMPTY:
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/// SB = .destination
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/// :upper16:label - SB = 0
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// CHECK: 12700: movt r0, #0
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// CHECK: 12b00: movt r0, #0
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/// :upper16:label1 - SB = 0
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// CHECK: movt r1, #0
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/// :upper16:label2 - SB = 0
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