forked from OSchip/llvm-project
[X86] Simplify lowerVectorShuffleAsBitMask to handle only integer VT's
Summary: This function is only called with integer VT arguments, so remove code that handles FP vectors. Reviewers: RKSimon, craig.topper, delena, andreadb Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26985 llvm-svn: 287743
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@ -7627,16 +7627,11 @@ static SDValue lowerVectorShuffleAsBitMask(const SDLoc &DL, MVT VT, SDValue V1,
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SDValue V2, ArrayRef<int> Mask,
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const SmallBitVector &Zeroable,
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SelectionDAG &DAG) {
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assert(!VT.isFloatingPoint() && "Floating point types are not supported");
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MVT EltVT = VT.getVectorElementType();
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int NumEltBits = EltVT.getSizeInBits();
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MVT IntEltVT = MVT::getIntegerVT(NumEltBits);
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SDValue Zero = DAG.getConstant(0, DL, IntEltVT);
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SDValue AllOnes = DAG.getConstant(APInt::getAllOnesValue(NumEltBits), DL,
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IntEltVT);
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if (EltVT.isFloatingPoint()) {
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Zero = DAG.getBitcast(EltVT, Zero);
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AllOnes = DAG.getBitcast(EltVT, AllOnes);
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}
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SDValue Zero = DAG.getConstant(0, DL, EltVT);
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SDValue AllOnes =
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DAG.getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, EltVT);
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SmallVector<SDValue, 16> VMaskOps(Mask.size(), Zero);
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SDValue V;
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for (int i = 0, Size = Mask.size(); i < Size; ++i) {
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@ -7655,10 +7650,7 @@ static SDValue lowerVectorShuffleAsBitMask(const SDLoc &DL, MVT VT, SDValue V1,
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return SDValue(); // No non-zeroable elements!
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SDValue VMask = DAG.getBuildVector(VT, DL, VMaskOps);
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V = DAG.getNode(VT.isFloatingPoint()
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? (unsigned) X86ISD::FAND : (unsigned) ISD::AND,
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DL, VT, V, VMask);
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return V;
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return DAG.getNode(ISD::AND, DL, VT, V, VMask);
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}
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/// \brief Try to emit a blend instruction for a shuffle using bit math.
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