forked from OSchip/llvm-project
[LV] Use exiting block instead of latch in addUsersInExitBlock.
The latch may not be the exiting block. Use the exiting block instead when looking up the incoming value of the LCSSA phi node. This fixes a crash with early-exit loops.
This commit is contained in:
Florian Hahn
parent
c230ab6db8
commit
145fe57106
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@ -8703,14 +8703,15 @@ static void addUsersInExitBlock(VPBasicBlock *HeaderVPBB,
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VPBasicBlock *MiddleVPBB, Loop *OrigLoop,
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VPlan &Plan) {
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BasicBlock *ExitBB = OrigLoop->getUniqueExitBlock();
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BasicBlock *ExitingBB = OrigLoop->getExitingBlock();
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// Only handle single-exit loops with unique exit blocks for now.
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if (!ExitBB || !ExitBB->getSinglePredecessor())
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if (!ExitBB || !ExitBB->getSinglePredecessor() || !ExitingBB)
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return;
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// Introduce VPUsers modeling the exit values.
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for (PHINode &ExitPhi : ExitBB->phis()) {
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Value *IncomingValue =
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ExitPhi.getIncomingValueForBlock(OrigLoop->getLoopLatch());
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ExitPhi.getIncomingValueForBlock(ExitingBB);
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VPValue *V = Plan.getOrAddVPValue(IncomingValue, true);
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Plan.addLiveOut(&ExitPhi, V);
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}
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@ -190,6 +190,80 @@ if.end:
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ret void
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}
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define i32 @early_exit_with_live_out(i32* %ptr) {
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; CHECK-LABEL: @early_exit_with_live_out(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 [[TMP0]]
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP1]], i32 0
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP3]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>*
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; CHECK-NEXT: store <2 x i32> <i32 10, i32 10>, <2 x i32>* [[TMP4]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 998
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; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 998, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
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; CHECK: loop.header:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[PTR]], i64 [[IV]]
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; CHECK-NEXT: [[L:%.*]] = load i32, i32* [[GEP]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000
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; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: store i32 10, i32* [[GEP]], align 4
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; CHECK-NEXT: br label [[LOOP_HEADER]], !llvm.loop [[LOOP7:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi i32 [ [[L]], [[LOOP_HEADER]] ]
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; CHECK-NEXT: ret i32 [[RES_LCSSA]]
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;
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; TAILFOLD-LABEL: @early_exit_with_live_out(
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; TAILFOLD-NEXT: entry:
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; TAILFOLD-NEXT: br label [[LOOP_HEADER:%.*]]
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; TAILFOLD: loop.header:
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; TAILFOLD-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; TAILFOLD-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 [[IV]]
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; TAILFOLD-NEXT: [[L:%.*]] = load i32, i32* [[GEP]], align 4
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; TAILFOLD-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; TAILFOLD-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000
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; TAILFOLD-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_LATCH]]
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; TAILFOLD: loop.latch:
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; TAILFOLD-NEXT: store i32 10, i32* [[GEP]], align 4
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; TAILFOLD-NEXT: br label [[LOOP_HEADER]]
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; TAILFOLD: exit:
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; TAILFOLD-NEXT: [[RES_LCSSA:%.*]] = phi i32 [ [[L]], [[LOOP_HEADER]] ]
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; TAILFOLD-NEXT: ret i32 [[RES_LCSSA]]
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%gep = getelementptr i32, i32* %ptr, i64 %iv
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%l = load i32, i32* %gep
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 1000
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br i1 %ec, label %exit, label %loop.latch
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loop.latch:
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store i32 10, i32* %gep
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br label %loop.header
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exit:
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%res.lcssa = phi i32 [ %l, %loop.header ]
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ret i32 %res.lcssa
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}
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; Same as early_exit, but with optsize to prevent the use of
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; a scalar epilogue. -- Can't vectorize this in either case.
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define void @optsize(i16* %p, i32 %n) optsize {
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@ -270,7 +344,7 @@ define void @multiple_unique_exit(i16* %p, i32 %n) {
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; CHECK-NEXT: store <2 x i16> zeroinitializer, <2 x i16>* [[TMP7]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -286,7 +360,7 @@ define void @multiple_unique_exit(i16* %p, i32 %n) {
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], !llvm.loop [[LOOP7:![0-9]+]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], !llvm.loop [[LOOP9:![0-9]+]]
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; CHECK: if.end:
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; CHECK-NEXT: ret void
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;
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@ -352,7 +426,7 @@ define i32 @multiple_unique_exit2(i16* %p, i32 %n) {
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; CHECK-NEXT: store <2 x i16> zeroinitializer, <2 x i16>* [[TMP7]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -368,7 +442,7 @@ define i32 @multiple_unique_exit2(i16* %p, i32 %n) {
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], !llvm.loop [[LOOP9:![0-9]+]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], !llvm.loop [[LOOP11:![0-9]+]]
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; CHECK: if.end:
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; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_BODY]] ], [ [[I]], [[FOR_COND]] ]
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; CHECK-NEXT: ret i32 [[I_LCSSA]]
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@ -436,7 +510,7 @@ define i32 @multiple_unique_exit3(i16* %p, i32 %n) {
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; CHECK-NEXT: store <2 x i16> zeroinitializer, <2 x i16>* [[TMP7]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -452,7 +526,7 @@ define i32 @multiple_unique_exit3(i16* %p, i32 %n) {
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], !llvm.loop [[LOOP11:![0-9]+]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], !llvm.loop [[LOOP13:![0-9]+]]
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; CHECK: if.end:
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; CHECK-NEXT: [[EXIT:%.*]] = phi i32 [ 0, [[FOR_COND]] ], [ 1, [[FOR_BODY]] ]
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; CHECK-NEXT: ret i32 [[EXIT]]
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@ -521,7 +595,7 @@ define i32 @multiple_exit_blocks(i16* %p, i32 %n) {
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; CHECK-NEXT: store <2 x i16> zeroinitializer, <2 x i16>* [[TMP7]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -537,7 +611,7 @@ define i32 @multiple_exit_blocks(i16* %p, i32 %n) {
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]], !llvm.loop [[LOOP13:![0-9]+]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]], !llvm.loop [[LOOP15:![0-9]+]]
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; CHECK: if.end:
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; CHECK-NEXT: ret i32 0
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; CHECK: if.end2:
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@ -610,7 +684,7 @@ define i32 @multiple_exit_blocks2(i16* %p, i32 %n) {
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; CHECK-NEXT: store <2 x i16> zeroinitializer, <2 x i16>* [[TMP7]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -626,7 +700,7 @@ define i32 @multiple_exit_blocks2(i16* %p, i32 %n) {
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]], !llvm.loop [[LOOP15:![0-9]+]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]], !llvm.loop [[LOOP17:![0-9]+]]
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; CHECK: if.end:
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; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_COND]] ]
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; CHECK-NEXT: ret i32 [[I_LCSSA]]
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@ -706,7 +780,7 @@ define i32 @multiple_exit_blocks3(i16* %p, i32 %n) {
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], <i32 2, i32 2>
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; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -722,7 +796,7 @@ define i32 @multiple_exit_blocks3(i16* %p, i32 %n) {
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]], !llvm.loop [[LOOP17:![0-9]+]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]], !llvm.loop [[LOOP19:![0-9]+]]
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; CHECK: if.end:
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; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_COND]] ]
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; CHECK-NEXT: ret i32 [[I_LCSSA]]
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@ -1049,7 +1123,7 @@ define void @scalar_predication(float* %addr) {
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; CHECK: pred.store.continue2:
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 200
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; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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@ -1069,7 +1143,7 @@ define void @scalar_predication(float* %addr) {
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: br label [[LOOP_HEADER]], !llvm.loop [[LOOP19:![0-9]+]]
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; CHECK-NEXT: br label [[LOOP_HEADER]], !llvm.loop [[LOOP21:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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@ -1137,7 +1211,7 @@ define i32 @me_reduction(i32* %addr) {
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; CHECK-NEXT: [[TMP4]] = add <2 x i32> [[VEC_PHI]], [[WIDE_LOAD]]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 200
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; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
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; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> [[TMP4]])
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; CHECK-NEXT: br label [[SCALAR_PH]]
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@ -1156,7 +1230,7 @@ define i32 @me_reduction(i32* %addr) {
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; CHECK-NEXT: [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[TMP7]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EXITCOND2_NOT:%.*]] = icmp eq i64 [[IV]], 400
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; CHECK-NEXT: br i1 [[EXITCOND2_NOT]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP21:![0-9]+]]
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; CHECK-NEXT: br i1 [[EXITCOND2_NOT]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP23:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: [[LCSSA:%.*]] = phi i32 [ 0, [[LOOP_HEADER]] ], [ [[ACCUM_NEXT]], [[LOOP_LATCH]] ]
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; CHECK-NEXT: ret i32 [[LCSSA]]
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