Support/ELF: Add R_AMDGPU_GOTPCREL relocation

Summary:
We will start generating this in a future patch.

Reviewers: arsenm, kzhuravl, rafael, ruiu, tony-tye

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D21482

llvm-svn: 273628

llvm/docs/CodeGenerator.rst

@@ -2676,6 +2676,9 @@ Following notations are used for specifying relocation calculations:
 
 * **A** --- Represents the addend used to compute the value of the relocatable
   field
+* **G** --- Represents the offset into the global offset table at which the
+  relocation entry’s symbol will reside during execution.
+* **GOT** --- Represents the address of the global offset table.
 * **P** --- Represents the place (section offset or address) of the storage unit
   being relocated (computed using ``r_offset``)
 * **S** --- Represents the value of the symbol whose index resides in the
@@ -2694,4 +2697,5 @@ supported relocation types:
   ``R_AMDGPU_REL32``     4      ``word32``  S + A - P
   ``R_AMDGPU_REL64``     5      ``word64``  S + A - P
   ``R_AMDGPU_ABS32``     6      ``word32``  S + A
+  ``R_AMDGPU_GOTPCREL``  7      ``word32``  G + GOT + A - P
   =====================  =====  ==========  ====================

llvm/include/llvm/Support/ELFRelocs/AMDGPU.def

@@ -9,3 +9,4 @@ ELF_RELOC(R_AMDGPU_ABS64,         3)
 ELF_RELOC(R_AMDGPU_REL32,         4)
 ELF_RELOC(R_AMDGPU_REL64,         5)
 ELF_RELOC(R_AMDGPU_ABS32,         6)
+ELF_RELOC(R_AMDGPU_GOTPCREL,      7)

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp

@@ -45,6 +45,13 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
   if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
     return ELF::R_AMDGPU_ABS32_HI;
 
+  switch (Target.getAccessVariant()) {
+  default:
+    break;
+  case MCSymbolRefExpr::VK_GOTPCREL:
+    return ELF::R_AMDGPU_GOTPCREL;
+  }
+
   switch (Fixup.getKind()) {
   default: break;
   case FK_PCRel_4:

llvm/test/MC/AMDGPU/reloc.s

@@ -3,10 +3,14 @@
 // CHECK: Relocations [
 // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
 // CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
+// CHECK: R_AMDGPU_GOTPCREL global_var 0x0
 // CHECK: ]
 
 kernel:
   s_mov_b32 s0, SCRATCH_RSRC_DWORD0
   s_mov_b32 s1, SCRATCH_RSRC_DWORD1
+  s_mov_b32 s2, global_var@GOTPCREL
+
+.globl global_var
 
 .globl SCRATCH_RSRC_DWORD0