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[Attributor] Only non-exact accesses require a uniform bit-pattern (=0) 

If we only have exact accesses we should never require the bit-pattern
to be uniform (in this case 0). Only a non-exact access should force us
to require only 0 values.
This commit is contained in:
Johannes Doerfert 2022-07-10 13:46:42 -05:00
parent 67f1fe8597
commit 142897dd7d
2 changed files with 8 additions and 8 deletions
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8
llvm/lib/Transforms/IPO/Attributor.cpp
View File

@ -378,13 +378,13 @@ static bool getPotentialCopiesOfMemoryValue(
bool NullOnly = true; bool NullOnly = true;
bool NullRequired = false; bool NullRequired = false;
auto CheckForNullOnlyAndUndef = [&](Optional<Value *> V) { auto CheckForNullOnlyAndUndef = [&](Optional<Value *> V, bool IsExact) {
if (!V || *V == nullptr) if (!V || *V == nullptr)
NullOnly = false; NullOnly = false;
else if (isa<UndefValue>(*V)) else if (isa<UndefValue>(*V))
/* No op */; /* No op */;
else if (isa<Constant>(*V) && cast<Constant>(*V)->isNullValue()) else if (isa<Constant>(*V) && cast<Constant>(*V)->isNullValue())
NullRequired = true; NullRequired = !IsExact;
else else
NullOnly = false; NullOnly = false;
}; };
@ -395,7 +395,7 @@ static bool getPotentialCopiesOfMemoryValue(
LLVM_DEBUG(dbgs() << "Failed to get initial value: " << *Obj << "\n"); LLVM_DEBUG(dbgs() << "Failed to get initial value: " << *Obj << "\n");
return false; return false;
} }
CheckForNullOnlyAndUndef(InitialValue); CheckForNullOnlyAndUndef(InitialValue, /* IsExact */ true);
NewCopies.push_back(InitialValue); NewCopies.push_back(InitialValue);
NewCopyOrigins.push_back(nullptr); NewCopyOrigins.push_back(nullptr);
} }
@ -405,7 +405,7 @@ static bool getPotentialCopiesOfMemoryValue(
return true; return true;
if (IsLoad && Acc.isWrittenValueYetUndetermined()) if (IsLoad && Acc.isWrittenValueYetUndetermined())
return true; return true;
CheckForNullOnlyAndUndef(Acc.getContent()); CheckForNullOnlyAndUndef(Acc.getContent(), IsExact);
if (OnlyExact && !IsExact && !NullOnly && if (OnlyExact && !IsExact && !NullOnly &&
!isa_and_nonnull<UndefValue>(Acc.getWrittenValue())) { !isa_and_nonnull<UndefValue>(Acc.getWrittenValue())) {
LLVM_DEBUG(dbgs() << "Non exact access " << *Acc.getRemoteInst() LLVM_DEBUG(dbgs() << "Non exact access " << *Acc.getRemoteInst()

8
llvm/test/Transforms/Attributor/value-simplify-gpu.ll
View File

@ -288,7 +288,7 @@ define internal void @level2a(i32* %addr) {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4
; IS__TUNIT____-NEXT: call void @use(i32 [[TMP0]], i32 [[TMP1]], i32 17) #[[ATTR6]] ; IS__TUNIT____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 17) #[[ATTR6]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nosync nounwind ; IS__CGSCC____: Function Attrs: nosync nounwind
@ -298,7 +298,7 @@ define internal void @level2a(i32* %addr) {
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4
; IS__CGSCC____-NEXT: [[QQQQ2:%.*]] = load i32, i32* [[ADDR]], align 4 ; IS__CGSCC____-NEXT: [[QQQQ2:%.*]] = load i32, i32* [[ADDR]], align 4
; IS__CGSCC____-NEXT: call void @use(i32 [[TMP0]], i32 [[TMP1]], i32 [[QQQQ2]]) #[[ATTR4]] ; IS__CGSCC____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 [[QQQQ2]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
@ -316,7 +316,7 @@ define internal void @level2b(i32* %addr) {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4
; IS__TUNIT____-NEXT: call void @use(i32 [[TMP0]], i32 [[TMP1]], i32 17) #[[ATTR6]] ; IS__TUNIT____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 17) #[[ATTR6]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nosync nounwind ; IS__CGSCC____: Function Attrs: nosync nounwind
@ -326,7 +326,7 @@ define internal void @level2b(i32* %addr) {
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[ADDR]], align 4 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[ADDR]], align 4
; IS__CGSCC____-NEXT: call void @use(i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) #[[ATTR4]] ; IS__CGSCC____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 [[TMP2]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry: