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[PowerPC] Implement vector float and vector double version for vec_orc builtin 

The builtin for vec_orc has support for the following two signatures,
but currently the compiler marks it ambiguous:
vector float vec_orc(vector float, vector float)
vector double vec_orc(vector double, vector double)

This patch implements these two builtins.

Differential revision: https://reviews.llvm.org/D110858
This commit is contained in:
Albion Fung 2021-10-06 02:42:17 -05:00
parent 91d15aa0b8
commit 13d3cd37e2
2 changed files with 25 additions and 0 deletions
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11
clang/lib/Headers/altivec.h
View File

@ -7109,6 +7109,11 @@ vec_orc(vector float __a, vector bool int __b) {
return (vector float)((vector unsigned int)__a | ~__b);
}
static __inline__ vector float __ATTRS_o_ai vec_orc(vector float __a,
vector float __b) {
return (vector float)((vector unsigned int)__a | ~(vector unsigned int)__b);
}
static __inline__ vector signed long long __ATTRS_o_ai
vec_orc(vector signed long long __a, vector signed long long __b) {
return __a | ~__b;
@ -7153,6 +7158,12 @@ static __inline__ vector double __ATTRS_o_ai
vec_orc(vector bool long long __a, vector double __b) {
return (vector double)(__a | ~(vector unsigned long long)__b);
}
static __inline__ vector double __ATTRS_o_ai vec_orc(vector double __a,
vector double __b) {
return (vector double)((vector bool long long)__a |
~(vector unsigned long long)__b);
}
#endif
/* vec_vor */

14
clang/test/CodeGen/builtins-ppc-p8vector.c
View File

@ -35,7 +35,9 @@ vector signed __int128 vsx = { 1 };
vector unsigned __int128 vux = { 1 };
vector float vfa = { 1.e-4f, -132.23f, -22.1, 32.00f };
vector float vfb = { 1.e-4f, -132.23f, -22.1, 32.00f };
vector double vda = { 1.e-11, -132.23e10 };
vector double vdb = { 1.e-11, -132.23e10 };
int res_i;
double res_d;
@ -1067,6 +1069,12 @@ void test1() {
// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: or <4 x i32> {{%.+}}, [[T1]]
// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
res_vf = vec_orc(vfa, vfb);
// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: or <4 x i32> {{%.+}}, [[T1]]
// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
res_vsll = vec_orc(vsll, vsll);
@ -1121,6 +1129,12 @@ void test1() {
// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
// CHECK: or <2 x i64> {{%.+}}, [[T1]]
// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]]
res_vd = vec_orc(vda, vdb);
// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
// CHECK: or <2 x i64> {{%.+}}, [[T1]]
// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]]
/* vec_sub */