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[AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx 

This only covers AMDGPU BE, hopefully all occurrences.

Differential Revision: https://reviews.llvm.org/D54235

llvm-svn: 346528
This commit is contained in:
Stanislav Mekhanoshin 2018-11-09 17:58:59 +00:00
parent 567906d8c7
commit 13d3371e68
4 changed files with 10 additions and 7 deletions
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5
llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
View File

@ -42,9 +42,12 @@ static bool shouldScheduleAdjacent(const TargetInstrInfo &TII_,
if (!FirstMI)
return true;
const MachineBasicBlock &MBB = *FirstMI->getParent();
const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
const MachineOperand *Src2 = TII.getNamedOperand(SecondMI,
AMDGPU::OpName::src2);
return FirstMI->definesRegister(Src2->getReg());
return FirstMI->definesRegister(Src2->getReg(), TRI);
}
default:
return false;

4
llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
View File

@ -226,11 +226,11 @@ private:
// occur in the same basic block as its definition, because
// it is illegal for the scheduler to schedule them in
// different blocks.
if (UseI->readsRegister(MOI->getReg()))
if (UseI->readsRegister(MOI->getReg(), &TRI))
LastUseCount = AluInstCount;
// Exit early if the current use kills the register
if (UseI != Def && UseI->killsRegister(MOI->getReg()))
if (UseI != Def && UseI->killsRegister(MOI->getReg(), &TRI))
break;
}
if (LastUseCount)

4
llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
View File

@ -229,11 +229,11 @@ bool R600InstrInfo::mustBeLastInClause(unsigned Opcode) const {
}
bool R600InstrInfo::usesAddressRegister(MachineInstr &MI) const {
return MI.findRegisterUseOperandIdx(R600::AR_X) != -1;
return MI.findRegisterUseOperandIdx(R600::AR_X, false, &RI) != -1;
}
bool R600InstrInfo::definesAddressRegister(MachineInstr &MI) const {
return MI.findRegisterDefOperandIdx(R600::AR_X) != -1;
return MI.findRegisterDefOperandIdx(R600::AR_X, false, false, &RI) != -1;
}
bool R600InstrInfo::readsLDSSrcReg(const MachineInstr &MI) const {

4
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
View File

@ -4934,10 +4934,10 @@ void SIInstrInfo::addSCCDefUsersToVALUWorklist(
make_range(MachineBasicBlock::iterator(SCCDefInst),
SCCDefInst.getParent()->end())) {
// Exit if we find another SCC def.
if (MI.findRegisterDefOperandIdx(AMDGPU::SCC) != -1)
if (MI.findRegisterDefOperandIdx(AMDGPU::SCC, false, false, &RI) != -1)
return;
if (MI.findRegisterUseOperandIdx(AMDGPU::SCC) != -1)
if (MI.findRegisterUseOperandIdx(AMDGPU::SCC, false, &RI) != -1)
Worklist.insert(&MI);
}
}