forked from OSchip/llvm-project
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation.
R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
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4102bfbe71
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@ -1225,6 +1225,7 @@ bool AArch64TargetInfo::relocNeedsPlt(uint32_t Type,
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case R_AARCH64_CALL26:
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case R_AARCH64_CONDBR19:
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case R_AARCH64_JUMP26:
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case R_AARCH64_TSTBR14:
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return canBePreempted(&S, true);
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}
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}
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@ -1320,6 +1321,12 @@ void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
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case R_AARCH64_PREL64:
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write64le(Loc, SA - P);
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break;
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case R_AARCH64_TSTBR14: {
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uint64_t X = SA - P;
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checkInt<16>(X, Type);
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or32le(Loc, (X & 0xFFFC) << 3);
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break;
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}
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default:
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error("unrecognized reloc " + Twine(Type));
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}
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@ -0,0 +1,12 @@
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.globl _foo
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_foo:
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nop
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nop
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nop
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nop
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.globl _bar
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_bar:
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nop
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nop
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nop
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@ -0,0 +1,96 @@
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# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/aarch64-tstbr14-reloc.s -o %t1
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# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t2
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# RUN: ld.lld %t1 %t2 -o %t
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# RUN: llvm-objdump -d %t | FileCheck %s
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# RUN: ld.lld -shared %t1 %t2 -o %t3
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# RUN: llvm-objdump -d %t3 | FileCheck -check-prefix=DSO %s
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# RUN: llvm-readobj -s -r %t3 | FileCheck -check-prefix=DSOREL %s
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# REQUIRES: aarch64
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# 0x1101c - 28 = 0x11000
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# 0x11020 - 16 = 0x11010
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# 0x11024 - 36 = 0x11000
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# 0x11028 - 24 = 0x11010
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# CHECK: Disassembly of section .text:
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# CHECK-NEXT: _foo:
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# CHECK-NEXT: 11000: {{.*}} nop
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# CHECK-NEXT: 11004: {{.*}} nop
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# CHECK-NEXT: 11008: {{.*}} nop
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# CHECK-NEXT: 1100c: {{.*}} nop
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# CHECK: _bar:
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# CHECK-NEXT: 11010: {{.*}} nop
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# CHECK-NEXT: 11014: {{.*}} nop
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# CHECK-NEXT: 11018: {{.*}} nop
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# CHECK: _start:
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# CHECK-NEXT: 1101c: {{.*}} tbnz w3, #15, #-28
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# CHECK-NEXT: 11020: {{.*}} tbnz w3, #15, #-16
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# CHECK-NEXT: 11024: {{.*}} tbz x6, #45, #-36
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# CHECK-NEXT: 11028: {{.*}} tbz x6, #45, #-24
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#DSOREL: Section {
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#DSOREL: Index:
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#DSOREL: Name: .got.plt
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#DSOREL-NEXT: Type: SHT_PROGBITS
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#DSOREL-NEXT: Flags [
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#DSOREL-NEXT: SHF_ALLOC
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#DSOREL-NEXT: SHF_WRITE
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#DSOREL-NEXT: ]
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#DSOREL-NEXT: Address: 0x3000
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#DSOREL-NEXT: Offset: 0x3000
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#DSOREL-NEXT: Size: 40
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#DSOREL-NEXT: Link: 0
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#DSOREL-NEXT: Info: 0
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#DSOREL-NEXT: AddressAlignment: 8
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#DSOREL-NEXT: EntrySize: 0
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#DSOREL-NEXT: }
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#DSOREL: Relocations [
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#DSOREL-NEXT: Section ({{.*}}) .rela.plt {
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#DSOREL-NEXT: 0x3018 R_AARCH64_JUMP_SLOT _foo
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#DSOREL-NEXT: 0x3020 R_AARCH64_JUMP_SLOT _bar
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#DSOREL-NEXT: }
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#DSOREL-NEXT:]
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#DSO: Disassembly of section .text:
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#DSO-NEXT: _foo:
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#DSO-NEXT: 1000: {{.*}} nop
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#DSO-NEXT: 1004: {{.*}} nop
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#DSO-NEXT: 1008: {{.*}} nop
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#DSO-NEXT: 100c: {{.*}} nop
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#DSO: _bar:
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#DSO-NEXT: 1010: {{.*}} nop
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#DSO-NEXT: 1014: {{.*}} nop
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#DSO-NEXT: 1018: {{.*}} nop
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#DSO: _start:
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# 0x101c + 52 = 0x1050 = PLT[1]
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# 0x1020 + 64 = 0x1060 = PLT[2]
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# 0x1024 + 44 = 0x1050 = PLT[1]
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# 0x1028 + 56 = 0x1060 = PLT[2]
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#DSO-NEXT: 101c: {{.*}} tbnz w3, #15, #52
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#DSO-NEXT: 1020: {{.*}} tbnz w3, #15, #64
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#DSO-NEXT: 1024: {{.*}} tbz x6, #45, #44
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#DSO-NEXT: 1028: {{.*}} tbz x6, #45, #56
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#DSO-NEXT: Disassembly of section .plt:
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#DSO-NEXT: .plt:
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#DSO-NEXT: 1030: {{.*}} stp x16, x30, [sp, #-16]!
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#DSO-NEXT: 1034: {{.*}} adrp x16, #8192
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#DSO-NEXT: 1038: {{.*}} ldr x17, [x16, #16]
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#DSO-NEXT: 103c: {{.*}} add x16, x16, #16
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#DSO-NEXT: 1040: {{.*}} br x17
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#DSO-NEXT: 1044: {{.*}} nop
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#DSO-NEXT: 1048: {{.*}} nop
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#DSO-NEXT: 104c: {{.*}} nop
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#DSO-NEXT: 1050: {{.*}} adrp x16, #8192
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#DSO-NEXT: 1054: {{.*}} ldr x17, [x16, #24]
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#DSO-NEXT: 1058: {{.*}} add x16, x16, #24
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#DSO-NEXT: 105c: {{.*}} br x17
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#DSO-NEXT: 1060: {{.*}} adrp x16, #8192
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#DSO-NEXT: 1064: {{.*}} ldr x17, [x16, #32]
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#DSO-NEXT: 1068: {{.*}} add x16, x16, #32
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#DSO-NEXT: 106c: {{.*}} br x17
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.globl _start
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_start:
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tbnz w3, #15, _foo
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tbnz w3, #15, _bar
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tbz x6, #45, _foo
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tbz x6, #45, _bar
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