forked from OSchip/llvm-project
parent
def12f3be1
commit
137dcdba8a
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@ -621,8 +621,8 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt,
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return false;
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return false;
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}
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}
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// If destination register has a sub-register index on it, make sure it mtches
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// If destination register has a sub-register index on it, make sure it
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// the instruction register class.
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// matches the instruction register class.
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if (DstSubIdx) {
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if (DstSubIdx) {
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const TargetInstrDesc &TID = DefMI->getDesc();
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const TargetInstrDesc &TID = DefMI->getDesc();
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if (TID.getNumDefs() != 1)
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if (TID.getNumDefs() != 1)
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