forked from OSchip/llvm-project
Revert "DomTree: Make PostDomTree immune to block successors swap"
This reverts commit c35585e209.
The MLIR is broken with this patch, reproduce by adding
-DLLVM_ENABLE_PROJECTS=mlir to the cmake configuration and
build `ninja tools/mlir/lib/IR/CMakeFiles/obj.MLIRIR.dir/Dominance.cpp.o`
This commit is contained in:
Mehdi Amini
parent
02a629daad
commit
1366d66a22
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@ -151,8 +151,6 @@ struct SemiNCAInfo {
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}
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};
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using NodeOrderMap = DenseMap<NodePtr, unsigned>;
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// Custom DFS implementation which can skip nodes based on a provided
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// predicate. It also collects ReverseChildren so that we don't have to spend
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// time getting predecessors in SemiNCA.
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@ -160,13 +158,9 @@ struct SemiNCAInfo {
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// If IsReverse is set to true, the DFS walk will be performed backwards
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// relative to IsPostDom -- using reverse edges for dominators and forward
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// edges for postdominators.
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//
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// If SuccOrder is specified then in this order the DFS traverses the children
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// otherwise the order is implied by the results of getChildren().
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template <bool IsReverse = false, typename DescendCondition>
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unsigned runDFS(NodePtr V, unsigned LastNum, DescendCondition Condition,
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unsigned AttachToNum,
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const NodeOrderMap *SuccOrder = nullptr) {
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unsigned AttachToNum) {
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assert(V);
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SmallVector<NodePtr, 64> WorkList = {V};
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if (NodeToInfo.count(V) != 0) NodeToInfo[V].Parent = AttachToNum;
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@ -182,14 +176,7 @@ struct SemiNCAInfo {
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NumToNode.push_back(BB);
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constexpr bool Direction = IsReverse != IsPostDom; // XOR.
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auto Successors = getChildren<Direction>(BB, BatchUpdates);
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if (SuccOrder && Successors.size() > 1)
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llvm::sort(
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Successors.begin(), Successors.end(), [=](NodePtr A, NodePtr B) {
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return SuccOrder->find(A)->second < SuccOrder->find(B)->second;
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});
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for (const NodePtr Succ : Successors) {
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for (const NodePtr Succ : getChildren<Direction>(BB, BatchUpdates)) {
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const auto SIT = NodeToInfo.find(Succ);
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// Don't visit nodes more than once but remember to collect
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// ReverseChildren.
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@ -385,34 +372,6 @@ struct SemiNCAInfo {
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// nodes.
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if (Total + 1 != Num) {
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HasNonTrivialRoots = true;
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// SuccOrder is the order of blocks in the function. It is needed to make
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// the calculation of the FurthestAway node and the whole PostDomTree
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// immune to swap successors transformation (e.g. canonicalizing branch
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// predicates). SuccOrder is initialized lazily only for successors of
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// reverse unreachable nodes.
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Optional<NodeOrderMap> SuccOrder;
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auto InitSuccOrderOnce = [&]() {
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SuccOrder = NodeOrderMap();
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for (const auto Node : nodes(DT.Parent))
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if (SNCA.NodeToInfo.count(Node) == 0)
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for (const auto Succ : getChildren<false>(Node, SNCA.BatchUpdates))
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SuccOrder->try_emplace(Succ, 0);
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// Add mapping for all entries of SuccOrder.
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unsigned NodeNum = 0;
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for (const auto Node : nodes(DT.Parent)) {
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++NodeNum;
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auto Order = SuccOrder->find(Node);
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if (Order != SuccOrder->end()) {
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assert(Order->second == 0);
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Order->second = NodeNum;
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LLVM_DEBUG(dbgs() << "\t\t\tSuccOrder " << NodeNum << ": "
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<< Node->getName() << "\n");
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}
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}
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};
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// Make another DFS pass over all other nodes to find the
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// reverse-unreachable blocks, and find the furthest paths we'll be able
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// to make.
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@ -437,12 +396,7 @@ struct SemiNCAInfo {
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// expensive and does not always lead to a minimal set of roots.
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LLVM_DEBUG(dbgs() << "\t\t\tRunning forward DFS\n");
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if (!SuccOrder)
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InitSuccOrderOnce();
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assert(SuccOrder);
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const unsigned NewNum =
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SNCA.runDFS<true>(I, Num, AlwaysDescend, Num, &*SuccOrder);
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const unsigned NewNum = SNCA.runDFS<true>(I, Num, AlwaysDescend, Num);
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const NodePtr FurthestAway = SNCA.NumToNode[NewNum];
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LLVM_DEBUG(dbgs() << "\t\t\tFound a new furthest away node "
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<< "(non-trivial root): "
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@ -1,222 +0,0 @@
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; RUN: opt %s -disable-output -branch-prob -instcombine -block-freq -verify-dom-info
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; RUN: opt %s -postdomtree -analyze | FileCheck --check-prefixes=CHECK-POSTDOM %s
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; RUN: opt %s -passes='print<postdomtree>' 2>&1 | FileCheck --check-prefixes=CHECK-POSTDOM %s
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; Demonstrate that Predicate Canonicalization (InstCombine) does not invalidate PostDomTree
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; if the basic block is post-dom unreachable.
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define void @test1(i24 %a, i24 %b) {
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entry:
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br label %LOOP
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LOOP:
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%f = icmp uge i24 %a, %b
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br i1 %f, label %B1, label %B2
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B1:
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%x = add i24 %a, %b
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br label %B2
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B2:
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br label %LOOP
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}
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; The same as @test1 except the LOOP condition canonicalized (as by instcombine).
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define void @test1-canonicalized(i24 %a, i24 %b) {
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entry:
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br label %LOOP
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LOOP:
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%f.not = icmp ult i24 %a, %b
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br i1 %f.not, label %B2, label %B1
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B1:
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%x = add i24 %a, %b
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br label %B2
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B2:
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br label %LOOP
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}
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; The same as @test1 but different order of B1 and B2 in the function.
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; The different order makes PostDomTree different in presense of postdom
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; unreachable blocks.
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define void @test2(i24 %a, i24 %b) {
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entry:
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br label %LOOP
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LOOP:
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%f = icmp uge i24 %a, %b
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br i1 %f, label %B1, label %B2
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B2:
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br label %LOOP
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B1:
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%x = add i24 %a, %b
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br label %B2
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}
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; The same as @test2 except the LOOP condition canonicalized (as by instcombine).
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define void @test2-canonicalized(i24 %a, i24 %b) {
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entry:
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br label %LOOP
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LOOP:
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%f.not = icmp ult i24 %a, %b
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br i1 %f.not, label %B2, label %B1
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B2:
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br label %LOOP
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B1:
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%x = add i24 %a, %b
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br label %B2
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}
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; Two reverse unreachable subgraphs with RU1* and RU2* basic blocks respectively.
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define void @test3(i24 %a, i24 %b, i32 %flag) {
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entry:
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switch i32 %flag, label %EXIT [
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i32 1, label %RU1
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i32 2, label %RU2
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i32 3, label %RU2_B1
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]
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RU1:
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%f = icmp uge i24 %a, %b
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br label %RU1_LOOP
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RU1_LOOP:
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br i1 %f, label %RU1_B1, label %RU1_B2
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RU1_B1:
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%x = add i24 %a, %b
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br label %RU1_B2
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RU1_B2:
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br label %RU1_LOOP
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RU2:
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%f2 = icmp uge i24 %a, %b
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br i1 %f2, label %RU2_B1, label %RU2_B2
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RU2_B1:
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br label %RU2_B2
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RU2_B2:
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br label %RU2_B1
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EXIT:
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ret void
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}
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; The same as @test3 except the icmp conditions are canonicalized (as by instcombine).
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define void @test3-canonicalized(i24 %a, i24 %b, i32 %flag) {
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entry:
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switch i32 %flag, label %EXIT [
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i32 1, label %RU1
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i32 2, label %RU2
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i32 3, label %RU2_B1
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]
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RU1:
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%f.not = icmp ult i24 %a, %b
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br label %RU1_LOOP
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RU1_LOOP:
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br i1 %f.not, label %RU1_B2, label %RU1_B1
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RU1_B1:
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%x = add i24 %a, %b
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br label %RU1_B2
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RU1_B2:
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br label %RU1_LOOP
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RU2:
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%f2.not = icmp ult i24 %a, %b
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br i1 %f2.not, label %RU2_B2, label %RU2_B1
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RU2_B1:
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br label %RU2_B2
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RU2_B2:
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br label %RU2_B1
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EXIT:
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ret void
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}
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; PostDomTrees of @test1(), @test2() and @test3() are different.
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; PostDomTrees of @testX() and @testX-canonicalize() are the same.
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; CHECK-POSTDOM-LABEL: test1
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; CHECK-POSTDOM-NEXT: =============================--------------------------------
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; CHECK-POSTDOM-NEXT: Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
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; CHECK-POSTDOM-NEXT: [1] <<exit node>>
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; CHECK-POSTDOM-NEXT: [2] %B1
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; CHECK-POSTDOM-NEXT: [3] %LOOP
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; CHECK-POSTDOM-NEXT: [4] %entry
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; CHECK-POSTDOM-NEXT: [4] %B2
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; CHECK-POSTDOM-NEXT: Roots: %B1
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; CHECK-POSTDOM-LABEL: test1-canonicalized
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; CHECK-POSTDOM-NEXT: =============================--------------------------------
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; CHECK-POSTDOM-NEXT: Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
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; CHECK-POSTDOM-NEXT: [1] <<exit node>>
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; CHECK-POSTDOM-NEXT: [2] %B1
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; CHECK-POSTDOM-NEXT: [3] %LOOP
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; CHECK-POSTDOM-NEXT: [4] %entry
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; CHECK-POSTDOM-NEXT: [4] %B2
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; CHECK-POSTDOM-NEXT: Roots: %B1
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; CHECK-POSTDOM-LABEL: test2
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; CHECK-POSTDOM-NEXT: =============================--------------------------------
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; CHECK-POSTDOM-NEXT: Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
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; CHECK-POSTDOM-NEXT: [1] <<exit node>>
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; CHECK-POSTDOM-NEXT: [2] %B2
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; CHECK-POSTDOM-NEXT: [3] %LOOP
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; CHECK-POSTDOM-NEXT: [4] %entry
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; CHECK-POSTDOM-NEXT: [3] %B1
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; CHECK-POSTDOM-NEXT: Roots: %B2
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; CHECK-POSTDOM-LABEL: test2-canonicalized
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; CHECK-POSTDOM-NEXT: =============================--------------------------------
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; CHECK-POSTDOM-NEXT: Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
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; CHECK-POSTDOM-NEXT: [1] <<exit node>>
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; CHECK-POSTDOM-NEXT: [2] %B2
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; CHECK-POSTDOM-NEXT: [3] %LOOP
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; CHECK-POSTDOM-NEXT: [4] %entry
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; CHECK-POSTDOM-NEXT: [3] %B1
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; CHECK-POSTDOM-NEXT: Roots: %B2
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; CHECK-POSTDOM-LABEL: test3
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; CHECK-POSTDOM-NEXT:=============================--------------------------------
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; CHECK-POSTDOM-NEXT:Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
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; CHECK-POSTDOM-NEXT: [1] <<exit node>>
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; CHECK-POSTDOM-NEXT: [2] %EXIT
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; CHECK-POSTDOM-NEXT: [2] %entry
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; CHECK-POSTDOM-NEXT: [2] %RU1_B1
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; CHECK-POSTDOM-NEXT: [3] %RU1_LOOP
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; CHECK-POSTDOM-NEXT: [4] %RU1
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; CHECK-POSTDOM-NEXT: [4] %RU1_B2
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; CHECK-POSTDOM-NEXT: [2] %RU2_B1
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; CHECK-POSTDOM-NEXT: [3] %RU2
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; CHECK-POSTDOM-NEXT: [3] %RU2_B2
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; CHECK-POSTDOM-NEXT:Roots: %EXIT %RU1_B1 %RU2_B1
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; CHECK-POSTDOM-LABEL: test3-canonicalized
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; CHECK-POSTDOM-NEXT:=============================--------------------------------
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; CHECK-POSTDOM-NEXT:Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
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; CHECK-POSTDOM-NEXT: [1] <<exit node>>
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; CHECK-POSTDOM-NEXT: [2] %EXIT
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; CHECK-POSTDOM-NEXT: [2] %entry
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; CHECK-POSTDOM-NEXT: [2] %RU1_B1
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; CHECK-POSTDOM-NEXT: [3] %RU1_LOOP
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; CHECK-POSTDOM-NEXT: [4] %RU1
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; CHECK-POSTDOM-NEXT: [4] %RU1_B2
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; CHECK-POSTDOM-NEXT: [2] %RU2_B1
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; CHECK-POSTDOM-NEXT: [3] %RU2
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; CHECK-POSTDOM-NEXT: [3] %RU2_B2
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; CHECK-POSTDOM-NEXT:Roots: %EXIT %RU1_B1 %RU2_B1
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