diff --git a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp index 6c5ca5bbe1e9..f785d47100b3 100644 --- a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp +++ b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp @@ -57,6 +57,7 @@ #include "llvm/Support/Casting.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/DebugCounter.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/raw_ostream.h" @@ -80,6 +81,9 @@ STATISTIC(NumFastOther, "Number of other instrs removed"); STATISTIC(NumCompletePartials, "Number of stores dead by later partials"); STATISTIC(NumModifiedStores, "Number of stores modified"); +DEBUG_COUNTER(MemorySSACounter, "dse-memoryssa", + "Controls which MemoryDefs are eliminated."); + static cl::opt EnablePartialOverwriteTracking("enable-dse-partial-overwrite-tracking", cl::init(true), cl::Hidden, @@ -1795,6 +1799,9 @@ bool eliminateDeadStoresMemorySSA(Function &F, AliasAnalysis &AA, break; } + if (!DebugCounter::shouldExecute(MemorySSACounter)) + break; + // Check if NI overwrites SI. int64_t InstWriteOffset, DepWriteOffset; InstOverlapIntervalsTy IOL; diff --git a/llvm/test/Transforms/DeadStoreElimination/MSSA/debug-counter.ll b/llvm/test/Transforms/DeadStoreElimination/MSSA/debug-counter.ll new file mode 100644 index 000000000000..e2264ed6dabf --- /dev/null +++ b/llvm/test/Transforms/DeadStoreElimination/MSSA/debug-counter.ll @@ -0,0 +1,84 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py + +; Eliminates store to %R in the entry block. +; RUN: opt < %s -basicaa -dse -enable-dse-memoryssa -debug-counter=dse-memoryssa-skip=0,dse-memoryssa-count=1 -S | FileCheck --check-prefix=SKIP0-COUNT1 %s + +; Eliminates store to %P in the entry block. +; RUN: opt < %s -basicaa -dse -enable-dse-memoryssa -debug-counter=dse-memoryssa-skip=1,dse-memoryssa-count=1 -S | FileCheck --check-prefix=SKIP1-COUNT1 %s + +; Eliminates both stores in the entry block. +; RUN: opt < %s -basicaa -dse -enable-dse-memoryssa -debug-counter=dse-memoryssa-skip=0,dse-memoryssa-count=2 -S | FileCheck --check-prefix=SKIP0-COUNT2 %s + +; Eliminates no stores. +; RUN: opt < %s -basicaa -dse -enable-dse-memoryssa -debug-counter=dse-memoryssa-skip=2,dse-memoryssa-count=1 -S | FileCheck --check-prefix=SKIP2-COUNT1 %s + + +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" + + +define void @test(i32* noalias %P, i32* noalias %Q, i32* noalias %R) { +; SKIP0-COUNT1-LABEL: @test( +; SKIP0-COUNT1-NEXT: store i32 1, i32* [[P:%.*]] +; SKIP0-COUNT1-NEXT: br i1 true, label [[BB1:%.*]], label [[BB2:%.*]] +; SKIP0-COUNT1: bb1: +; SKIP0-COUNT1-NEXT: br label [[BB3:%.*]] +; SKIP0-COUNT1: bb2: +; SKIP0-COUNT1-NEXT: br label [[BB3]] +; SKIP0-COUNT1: bb3: +; SKIP0-COUNT1-NEXT: store i32 0, i32* [[Q:%.*]] +; SKIP0-COUNT1-NEXT: store i32 0, i32* [[R:%.*]] +; SKIP0-COUNT1-NEXT: store i32 0, i32* [[P]] +; SKIP0-COUNT1-NEXT: ret void +; +; SKIP1-COUNT1-LABEL: @test( +; SKIP1-COUNT1-NEXT: store i32 1, i32* [[R:%.*]] +; SKIP1-COUNT1-NEXT: br i1 true, label [[BB1:%.*]], label [[BB2:%.*]] +; SKIP1-COUNT1: bb1: +; SKIP1-COUNT1-NEXT: br label [[BB3:%.*]] +; SKIP1-COUNT1: bb2: +; SKIP1-COUNT1-NEXT: br label [[BB3]] +; SKIP1-COUNT1: bb3: +; SKIP1-COUNT1-NEXT: store i32 0, i32* [[Q:%.*]] +; SKIP1-COUNT1-NEXT: store i32 0, i32* [[R]] +; SKIP1-COUNT1-NEXT: store i32 0, i32* [[P:%.*]] +; SKIP1-COUNT1-NEXT: ret void +; +; SKIP0-COUNT2-LABEL: @test( +; SKIP0-COUNT2-NEXT: br i1 true, label [[BB1:%.*]], label [[BB2:%.*]] +; SKIP0-COUNT2: bb1: +; SKIP0-COUNT2-NEXT: br label [[BB3:%.*]] +; SKIP0-COUNT2: bb2: +; SKIP0-COUNT2-NEXT: br label [[BB3]] +; SKIP0-COUNT2: bb3: +; SKIP0-COUNT2-NEXT: store i32 0, i32* [[Q:%.*]] +; SKIP0-COUNT2-NEXT: store i32 0, i32* [[R:%.*]] +; SKIP0-COUNT2-NEXT: store i32 0, i32* [[P:%.*]] +; SKIP0-COUNT2-NEXT: ret void +; +; SKIP2-COUNT1-LABEL: @test( +; SKIP2-COUNT1-NEXT: store i32 1, i32* [[P:%.*]] +; SKIP2-COUNT1-NEXT: store i32 1, i32* [[R:%.*]] +; SKIP2-COUNT1-NEXT: br i1 true, label [[BB1:%.*]], label [[BB2:%.*]] +; SKIP2-COUNT1: bb1: +; SKIP2-COUNT1-NEXT: br label [[BB3:%.*]] +; SKIP2-COUNT1: bb2: +; SKIP2-COUNT1-NEXT: br label [[BB3]] +; SKIP2-COUNT1: bb3: +; SKIP2-COUNT1-NEXT: store i32 0, i32* [[Q:%.*]] +; SKIP2-COUNT1-NEXT: store i32 0, i32* [[R]] +; SKIP2-COUNT1-NEXT: store i32 0, i32* [[P]] +; SKIP2-COUNT1-NEXT: ret void +; + store i32 1, i32* %P + store i32 1, i32* %R + br i1 true, label %bb1, label %bb2 +bb1: + br label %bb3 +bb2: + br label %bb3 +bb3: + store i32 0, i32* %Q + store i32 0, i32* %R + store i32 0, i32* %P + ret void +}