forked from OSchip/llvm-project
[X86] Remove AVX512 pslldq/psrldq shift intrinsics. They aren't implemented yet and when they are they should be done with shuffles like SSE2 and AVX2.
llvm-svn: 229641
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@ -3254,22 +3254,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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[IntrNoMem]>;
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}
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// Integer shift ops.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx512_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi512">,
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Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
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llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi512">,
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Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
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llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_psll_dq_bs : GCCBuiltin<"__builtin_ia32_pslldqi512_byteshift">,
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Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
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llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_psrl_dq_bs : GCCBuiltin<"__builtin_ia32_psrldqi512_byteshift">,
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Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
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llvm_i32_ty], [IntrNoMem]>;
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}
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// Gather and Scatter ops
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let TargetPrefix = "x86" in {
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def int_x86_avx512_gather_dpd_512 : GCCBuiltin<"__builtin_ia32_gathersiv8df">,
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@ -2262,8 +2262,6 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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case llvm::Intrinsic::x86_sse_cvttps2pi:
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handleVectorConvertIntrinsic(I, 2);
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break;
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case llvm::Intrinsic::x86_avx512_psll_dq:
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case llvm::Intrinsic::x86_avx512_psrl_dq:
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case llvm::Intrinsic::x86_avx2_psll_w:
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case llvm::Intrinsic::x86_avx2_psll_d:
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case llvm::Intrinsic::x86_avx2_psll_q:
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@ -2327,10 +2325,6 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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handleVectorShiftIntrinsic(I, /* Variable */ true);
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break;
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// Byte shifts are not implemented.
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// case llvm::Intrinsic::x86_avx512_psll_dq_bs:
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// case llvm::Intrinsic::x86_avx512_psrl_dq_bs:
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case llvm::Intrinsic::x86_sse2_packsswb_128:
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case llvm::Intrinsic::x86_sse2_packssdw_128:
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case llvm::Intrinsic::x86_sse2_packuswb_128:
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