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[llvm-exegesis] Add unit test in preparation for DD109275

This commit is contained in:
Clement Courbet 2021-09-07 09:06:18 +02:00
parent 3e03d92e2f
commit 131f7bac63
1 changed files with 23 additions and 0 deletions
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23
llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
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@ -154,6 +154,29 @@ TEST_F(X86SerialSnippetGeneratorTest,
consumeError(std::move(Error));
}
TEST_F(X86SerialSnippetGeneratorTest,
AvoidSerializingThroughImplicitRegisters) {
// MULX32rr implicitly uses EDX. We should not select that register to avoid
// serialization.
const unsigned Opcode = X86::MULX32rr;
randomGenerator().seed(0); // Initialize seed.
const Instruction &Instr = State.getIC().getInstr(Opcode);
// Forbid all registers but RDX/EDX/DX/DH/DL. The only option would be to
// choose that register, but that would serialize the instruction, so we
// should be returning an error.
auto AllRegisters = State.getRATC().emptyRegisters();
AllRegisters.flip();
AllRegisters.reset(X86::RDX);
AllRegisters.reset(X86::EDX);
AllRegisters.reset(X86::DX);
AllRegisters.reset(X86::DH);
AllRegisters.reset(X86::DL);
auto Error =
Generator.generateCodeTemplates(&Instr, AllRegisters).takeError();
// FIXME: EXPECT_TRUE + consumeError(std::move(Error)).
EXPECT_FALSE((bool)Error);
}
TEST_F(X86SerialSnippetGeneratorTest, DependencyThroughOtherOpcode) {
// - CMP64rr
// - Op0 Explicit Use RegClass(GR64)