forked from OSchip/llvm-project
[LLD] [COFF] Fix alignment of thunks for ARM/ARM64
The alignment of ARM64 range extension thunks was fixed in
7c81649219
, but ARM range extension thunks, and import
and delay import thunks also need aligning (like all code on ARM
platforms).
I'm adding a test for alignment of ARM64 import thunks - not
specifically adding tests for misalignment of all of them though.
Differential Revision: https://reviews.llvm.org/D77796
This commit is contained in:
parent
2a99e700e0
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@ -486,7 +486,9 @@ public:
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class ImportThunkChunkARM : public ImportThunkChunk {
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public:
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explicit ImportThunkChunkARM(Defined *s) : ImportThunkChunk(s) {}
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explicit ImportThunkChunkARM(Defined *s) : ImportThunkChunk(s) {
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setAlignment(2);
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}
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size_t getSize() const override { return sizeof(importThunkARM); }
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void getBaserels(std::vector<Baserel> *res) override;
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void writeTo(uint8_t *buf) const override;
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@ -494,14 +496,16 @@ public:
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class ImportThunkChunkARM64 : public ImportThunkChunk {
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public:
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explicit ImportThunkChunkARM64(Defined *s) : ImportThunkChunk(s) {}
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explicit ImportThunkChunkARM64(Defined *s) : ImportThunkChunk(s) {
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setAlignment(4);
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}
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size_t getSize() const override { return sizeof(importThunkARM64); }
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void writeTo(uint8_t *buf) const override;
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};
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class RangeExtensionThunkARM : public NonSectionChunk {
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public:
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explicit RangeExtensionThunkARM(Defined *t) : target(t) {}
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explicit RangeExtensionThunkARM(Defined *t) : target(t) { setAlignment(2); }
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size_t getSize() const override;
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void writeTo(uint8_t *buf) const override;
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@ -365,7 +365,9 @@ public:
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class ThunkChunkARM : public NonSectionChunk {
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public:
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ThunkChunkARM(Defined *i, Chunk *tm) : imp(i), tailMerge(tm) {}
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ThunkChunkARM(Defined *i, Chunk *tm) : imp(i), tailMerge(tm) {
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setAlignment(2);
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}
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size_t getSize() const override { return sizeof(thunkARM); }
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@ -385,7 +387,9 @@ public:
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class TailMergeChunkARM : public NonSectionChunk {
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public:
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TailMergeChunkARM(Chunk *d, Defined *h) : desc(d), helper(h) {}
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TailMergeChunkARM(Chunk *d, Defined *h) : desc(d), helper(h) {
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setAlignment(2);
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}
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size_t getSize() const override { return sizeof(tailMergeARM); }
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@ -405,7 +409,9 @@ public:
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class ThunkChunkARM64 : public NonSectionChunk {
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public:
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ThunkChunkARM64(Defined *i, Chunk *tm) : imp(i), tailMerge(tm) {}
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ThunkChunkARM64(Defined *i, Chunk *tm) : imp(i), tailMerge(tm) {
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setAlignment(4);
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}
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size_t getSize() const override { return sizeof(thunkARM64); }
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@ -422,7 +428,9 @@ public:
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class TailMergeChunkARM64 : public NonSectionChunk {
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public:
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TailMergeChunkARM64(Chunk *d, Defined *h) : desc(d), helper(h) {}
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TailMergeChunkARM64(Chunk *d, Defined *h) : desc(d), helper(h) {
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setAlignment(4);
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}
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size_t getSize() const override { return sizeof(tailMergeARM64); }
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@ -11,18 +11,20 @@
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# BEFORE: 0: 00 00 00 94 bl 0x0
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# BEFORE: 4: 00 00 00 94 bl 0x4
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# BEFORE: 8: c0 03 5f d6 ret
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# BEFORE: c: ff <unknown>
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# AFTER: Disassembly of section .text:
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# AFTER-EMPTY:
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# AFTER: 140001000: 03 00 00 94 bl 0x14000100c
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# AFTER: 140001004: 05 00 00 94 bl 0x140001018
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# AFTER: 140001000: 04 00 00 94 bl 0x140001010
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# AFTER: 140001004: 06 00 00 94 bl 0x14000101c
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# AFTER: 140001008: c0 03 5f d6 ret
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# AFTER: 14000100c: 10 00 00 b0 adrp x16, #4096
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# AFTER: 140001010: 10 32 40 f9 ldr x16, [x16, #96]
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# AFTER: 140001014: 00 02 1f d6 br x16
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# AFTER: 140001018: 10 00 00 b0 adrp x16, #4096
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# AFTER: 14000101c: 10 3a 40 f9 ldr x16, [x16, #112]
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# AFTER: 140001020: 00 02 1f d6 br x16
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# AFTER: 14000100c: ff cc cc cc <unknown>
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# AFTER: 140001010: 10 00 00 b0 adrp x16, #4096
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# AFTER: 140001014: 10 32 40 f9 ldr x16, [x16, #96]
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# AFTER: 140001018: 00 02 1f d6 br x16
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# AFTER: 14000101c: 10 00 00 b0 adrp x16, #4096
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# AFTER: 140001020: 10 3a 40 f9 ldr x16, [x16, #112]
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# AFTER: 140001024: 00 02 1f d6 br x16
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# IMPORTS: Import {
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# IMPORTS: Name: library.dll
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@ -45,7 +47,7 @@ sections:
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- Name: .text
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Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
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Alignment: 4
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SectionData: 0000009400000094C0035FD6
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SectionData: 0000009400000094C0035FD6FF
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Relocations:
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- VirtualAddress: 0
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SymbolName: function
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