forked from OSchip/llvm-project
Fix PR14212: For some strange reason I treated vectors differently from
integers in that the code to handle split alloca-wide integer loads or stores doesn't come first. It should, for the same reasons as with integers, and the PR attests to that. Also had to fix a busted assert in that this test case also covers. llvm-svn: 167051
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@ -2490,9 +2490,6 @@ private:
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assert(OldOp == OldPtr);
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IRBuilder<> IRB(&LI);
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if (VecTy)
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return rewriteVectorizedLoadInst(IRB, LI, OldOp);
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uint64_t Size = EndOffset - BeginOffset;
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if (Size < TD.getTypeStoreSize(LI.getType())) {
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assert(!LI.isVolatile());
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@ -2502,7 +2499,7 @@ private:
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TD.getTypeStoreSizeInBits(LI.getType()) &&
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"Non-byte-multiple bit width");
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assert(LI.getType()->getIntegerBitWidth() ==
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TD.getTypeSizeInBits(OldAI.getAllocatedType()) &&
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TD.getTypeAllocSizeInBits(OldAI.getAllocatedType()) &&
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"Only alloca-wide loads can be split and recomposed");
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IntegerType *NarrowTy = Type::getIntNTy(LI.getContext(), Size * 8);
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bool IsConvertable = (BeginOffset - NewAllocaBeginOffset == 0) &&
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@ -2536,6 +2533,8 @@ private:
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return IsConvertable;
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}
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if (VecTy)
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return rewriteVectorizedLoadInst(IRB, LI, OldOp);
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if (IntTy && LI.getType()->isIntegerTy())
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return rewriteIntegerLoad(IRB, LI);
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@ -205,3 +205,18 @@ define i64 @test6(<4 x i64> %x, <4 x i64> %y, i64 %n) {
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%res = load i64* %addr, align 4
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ret i64 %res
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}
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define i32 @PR14212() {
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; CHECK: @PR14212
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; This caused a crash when "splitting" the load of the i32 in order to promote
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; the store of <3 x i8> properly. Heavily reduced from an OpenCL test case.
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entry:
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%retval = alloca <3 x i8>, align 4
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; CHECK-NOT: alloca
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store <3 x i8> undef, <3 x i8>* %retval, align 4
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%cast = bitcast <3 x i8>* %retval to i32*
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%load = load i32* %cast, align 4
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ret i32 %load
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; CHECK: ret i32
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}
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