From 128d9c6bbdef0f463acaba696ea0cc6602bb3b1d Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Fri, 14 May 2021 18:22:18 +0300 Subject: [PATCH] [NFC][X86][MCA] AMD Zen 3: add same-reg SSE XMM PSUBUS{B,W} tests --- .../llvm-mca/X86/Znver3/zero-idioms-sse-xmm.s | 192 ++++++++++++++++++ 1 file changed, 192 insertions(+) diff --git a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-sse-xmm.s b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-sse-xmm.s index 07cea25842a9..3cc444b78179 100644 --- a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-sse-xmm.s +++ b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-sse-xmm.s @@ -61,6 +61,16 @@ psubsw %xmm1, %xmm1 pxor %xmm0, %xmm1 # LLVM-MCA-END +# LLVM-MCA-BEGIN +psubusb %xmm1, %xmm1 +pxor %xmm0, %xmm1 +# LLVM-MCA-END + +# LLVM-MCA-BEGIN +psubusw %xmm1, %xmm1 +pxor %xmm0, %xmm1 +# LLVM-MCA-END + # CHECK: [0] Code Region # CHECK: Iterations: 10000 @@ -1152,3 +1162,185 @@ pxor %xmm0, %xmm1 # CHECK-NEXT: 0. 2 1.0 1.0 0.5 psubsw %xmm1, %xmm1 # CHECK-NEXT: 1. 2 2.0 0.0 0.0 pxor %xmm0, %xmm1 # CHECK-NEXT: 2 1.5 0.5 0.3 + +# CHECK: [12] Code Region + +# CHECK: Iterations: 10000 +# CHECK-NEXT: Instructions: 20000 +# CHECK-NEXT: Total Cycles: 20003 +# CHECK-NEXT: Total uOps: 20000 + +# CHECK: Dispatch Width: 6 +# CHECK-NEXT: uOps Per Cycle: 1.00 +# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: Block RThroughput: 0.5 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 psubusb %xmm1, %xmm1 +# CHECK-NEXT: 1 1 0.25 pxor %xmm0, %xmm1 + +# CHECK: Register File statistics: +# CHECK-NEXT: Total number of mappings created: 20000 +# CHECK-NEXT: Max number of mappings used: 66 + +# CHECK: * Register File #1 -- Zn3FpPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 20000 +# CHECK-NEXT: Max number of mappings used: 66 + +# CHECK: * Register File #2 -- Zn3IntegerPRF: +# CHECK-NEXT: Number of physical registers: 192 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn3AGU0 +# CHECK-NEXT: [1] - Zn3AGU1 +# CHECK-NEXT: [2] - Zn3AGU2 +# CHECK-NEXT: [3] - Zn3ALU0 +# CHECK-NEXT: [4] - Zn3ALU1 +# CHECK-NEXT: [5] - Zn3ALU2 +# CHECK-NEXT: [6] - Zn3ALU3 +# CHECK-NEXT: [7] - Zn3BRU1 +# CHECK-NEXT: [8] - Zn3FPP0 +# CHECK-NEXT: [9] - Zn3FPP1 +# CHECK-NEXT: [10] - Zn3FPP2 +# CHECK-NEXT: [11] - Zn3FPP3 +# CHECK-NEXT: [12.0] - Zn3FPP45 +# CHECK-NEXT: [12.1] - Zn3FPP45 +# CHECK-NEXT: [13] - Zn3FPSt +# CHECK-NEXT: [14.0] - Zn3LSU +# CHECK-NEXT: [14.1] - Zn3LSU +# CHECK-NEXT: [14.2] - Zn3LSU +# CHECK-NEXT: [15.0] - Zn3Load +# CHECK-NEXT: [15.1] - Zn3Load +# CHECK-NEXT: [15.2] - Zn3Load +# CHECK-NEXT: [16.0] - Zn3Store +# CHECK-NEXT: [16.1] - Zn3Store + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - - - - - - - - - psubusb %xmm1, %xmm1 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - - - - pxor %xmm0, %xmm1 + +# CHECK: Timeline view: +# CHECK-NEXT: Index 0123456 + +# CHECK: [0,0] DeER .. psubusb %xmm1, %xmm1 +# CHECK-NEXT: [0,1] D=eER.. pxor %xmm0, %xmm1 +# CHECK-NEXT: [1,0] D==eER. psubusb %xmm1, %xmm1 +# CHECK-NEXT: [1,1] D===eER pxor %xmm0, %xmm1 + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 2 2.0 0.5 0.0 psubusb %xmm1, %xmm1 +# CHECK-NEXT: 1. 2 3.0 0.0 0.0 pxor %xmm0, %xmm1 +# CHECK-NEXT: 2 2.5 0.3 0.0 + +# CHECK: [13] Code Region + +# CHECK: Iterations: 10000 +# CHECK-NEXT: Instructions: 20000 +# CHECK-NEXT: Total Cycles: 20003 +# CHECK-NEXT: Total uOps: 20000 + +# CHECK: Dispatch Width: 6 +# CHECK-NEXT: uOps Per Cycle: 1.00 +# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: Block RThroughput: 0.5 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 psubusw %xmm1, %xmm1 +# CHECK-NEXT: 1 1 0.25 pxor %xmm0, %xmm1 + +# CHECK: Register File statistics: +# CHECK-NEXT: Total number of mappings created: 20000 +# CHECK-NEXT: Max number of mappings used: 66 + +# CHECK: * Register File #1 -- Zn3FpPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 20000 +# CHECK-NEXT: Max number of mappings used: 66 + +# CHECK: * Register File #2 -- Zn3IntegerPRF: +# CHECK-NEXT: Number of physical registers: 192 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn3AGU0 +# CHECK-NEXT: [1] - Zn3AGU1 +# CHECK-NEXT: [2] - Zn3AGU2 +# CHECK-NEXT: [3] - Zn3ALU0 +# CHECK-NEXT: [4] - Zn3ALU1 +# CHECK-NEXT: [5] - Zn3ALU2 +# CHECK-NEXT: [6] - Zn3ALU3 +# CHECK-NEXT: [7] - Zn3BRU1 +# CHECK-NEXT: [8] - Zn3FPP0 +# CHECK-NEXT: [9] - Zn3FPP1 +# CHECK-NEXT: [10] - Zn3FPP2 +# CHECK-NEXT: [11] - Zn3FPP3 +# CHECK-NEXT: [12.0] - Zn3FPP45 +# CHECK-NEXT: [12.1] - Zn3FPP45 +# CHECK-NEXT: [13] - Zn3FPSt +# CHECK-NEXT: [14.0] - Zn3LSU +# CHECK-NEXT: [14.1] - Zn3LSU +# CHECK-NEXT: [14.2] - Zn3LSU +# CHECK-NEXT: [15.0] - Zn3Load +# CHECK-NEXT: [15.1] - Zn3Load +# CHECK-NEXT: [15.2] - Zn3Load +# CHECK-NEXT: [16.0] - Zn3Store +# CHECK-NEXT: [16.1] - Zn3Store + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - - - - - - - - - psubusw %xmm1, %xmm1 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - - - - pxor %xmm0, %xmm1 + +# CHECK: Timeline view: +# CHECK-NEXT: Index 0123456 + +# CHECK: [0,0] DeER .. psubusw %xmm1, %xmm1 +# CHECK-NEXT: [0,1] D=eER.. pxor %xmm0, %xmm1 +# CHECK-NEXT: [1,0] D==eER. psubusw %xmm1, %xmm1 +# CHECK-NEXT: [1,1] D===eER pxor %xmm0, %xmm1 + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 2 2.0 0.5 0.0 psubusw %xmm1, %xmm1 +# CHECK-NEXT: 1. 2 3.0 0.0 0.0 pxor %xmm0, %xmm1 +# CHECK-NEXT: 2 2.5 0.3 0.0