From 12350a8e133caefd43d1bc1d18baa66ba5202a3d Mon Sep 17 00:00:00 2001
From: Quentin Colombet <qcolombet@apple.com>
Date: Tue, 8 Mar 2016 00:29:15 +0000
Subject: [PATCH] [MIR] Print the type of generic machine instructions.

llvm-svn: 262880
---
 llvm/lib/CodeGen/MIRPrinter.cpp                         | 4 ++++
 llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index fa336c5edad9..6c3c63f919af 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -552,6 +552,10 @@ void MIPrinter::print(const MachineInstr &MI) {
   if (MI.getFlag(MachineInstr::FrameSetup))
     OS << "frame-setup ";
   OS << TII->getName(MI.getOpcode());
+  if (isPreISelGenericOpcode(MI.getOpcode())) {
+    assert(MI.getType() && "Generic instructions must have a type");
+    OS << ' ' << *MI.getType();
+  }
   if (I < E)
     OS << ' ';
 
diff --git a/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir b/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir
index 16f5488a6456..f3d2bc5a0247 100644
--- a/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir
@@ -13,6 +13,6 @@ registers:
 body: |
   bb.0.entry:
     liveins: %edi
-    ; CHECK:      %0(32) = G_ADD %edi
+    ; CHECK:      %0(32) = G_ADD i32 %edi
     %0(32) = G_ADD i32 %edi, %edi
 ...