forked from OSchip/llvm-project
parent
f8ac5288a3
commit
121d27e9e4
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@ -204,15 +204,6 @@ protected:
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unsigned Op0, bool Op0IsKill,
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unsigned Op0, bool Op0IsKill,
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uint64_t Imm, MVT ImmType);
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uint64_t Imm, MVT ImmType);
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/// FastEmit_rf_ - This method is a wrapper of FastEmit_rf. It first tries
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/// to emit an instruction with an immediate operand using FastEmit_rf.
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/// If that fails, it materializes the immediate into a register and try
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/// FastEmit_rr instead.
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unsigned FastEmit_rf_(MVT VT,
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unsigned Opcode,
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unsigned Op0, bool Op0IsKill,
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const ConstantFP *FPImm, MVT ImmType);
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/// FastEmit_i - This method is called by target-independent code
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/// FastEmit_i - This method is called by target-independent code
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/// to request that an instruction with the given type, opcode, and
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/// to request that an instruction with the given type, opcode, and
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/// immediate operand be emitted.
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/// immediate operand be emitted.
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@ -1035,53 +1035,6 @@ unsigned FastISel::FastEmit_ri_(MVT VT, unsigned Opcode,
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MaterialReg, /*Kill=*/true);
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MaterialReg, /*Kill=*/true);
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}
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}
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/// FastEmit_rf_ - This method is a wrapper of FastEmit_ri. It first tries
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/// to emit an instruction with a floating-point immediate operand using
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/// FastEmit_rf. If that fails, it materializes the immediate into a register
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/// and try FastEmit_rr instead.
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unsigned FastISel::FastEmit_rf_(MVT VT, unsigned Opcode,
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unsigned Op0, bool Op0IsKill,
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const ConstantFP *FPImm, MVT ImmType) {
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// First check if immediate type is legal. If not, we can't use the rf form.
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unsigned ResultReg = FastEmit_rf(VT, VT, Opcode, Op0, Op0IsKill, FPImm);
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if (ResultReg != 0)
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return ResultReg;
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// Materialize the constant in a register.
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unsigned MaterialReg = FastEmit_f(ImmType, ImmType, ISD::ConstantFP, FPImm);
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if (MaterialReg == 0) {
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// If the target doesn't have a way to directly enter a floating-point
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// value into a register, use an alternate approach.
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// TODO: The current approach only supports floating-point constants
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// that can be constructed by conversion from integer values. This should
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// be replaced by code that creates a load from a constant-pool entry,
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// which will require some target-specific work.
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const APFloat &Flt = FPImm->getValueAPF();
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EVT IntVT = TLI.getPointerTy();
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uint64_t x[2];
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uint32_t IntBitWidth = IntVT.getSizeInBits();
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bool isExact;
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(void) Flt.convertToInteger(x, IntBitWidth, /*isSigned=*/true,
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APFloat::rmTowardZero, &isExact);
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if (!isExact)
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return 0;
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APInt IntVal(IntBitWidth, 2, x);
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unsigned IntegerReg = FastEmit_i(IntVT.getSimpleVT(), IntVT.getSimpleVT(),
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ISD::Constant, IntVal.getZExtValue());
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if (IntegerReg == 0)
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return 0;
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MaterialReg = FastEmit_r(IntVT.getSimpleVT(), VT,
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ISD::SINT_TO_FP, IntegerReg, /*Kill=*/true);
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if (MaterialReg == 0)
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return 0;
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}
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return FastEmit_rr(VT, VT, Opcode,
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Op0, Op0IsKill,
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MaterialReg, /*Kill=*/true);
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}
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unsigned FastISel::createResultReg(const TargetRegisterClass* RC) {
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unsigned FastISel::createResultReg(const TargetRegisterClass* RC) {
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return MRI.createVirtualRegister(RC);
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return MRI.createVirtualRegister(RC);
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}
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}
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