[VE] Add SVOB intrinsic instruction

Add SVOB intrinsic instruction and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94279
This commit is contained in:
Kazushi (Jam) Marukawa 2021-01-07 23:27:39 +09:00
parent 8e3230ffa3
commit 12167632bc
3 changed files with 28 additions and 0 deletions

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@ -1,4 +1,10 @@
// Define intrinsics written by hand // Define intrinsics written by hand
// VEL Intrinsic instructions.
let TargetPrefix = "ve" in {
def int_ve_vl_svob : GCCBuiltin<"__builtin_ve_vl_svob">,
Intrinsic<[], [], [IntrHasSideEffects]>;
}
// Define intrinsics automatically generated // Define intrinsics automatically generated
include "llvm/IR/IntrinsicsVEVL.gen.td" include "llvm/IR/IntrinsicsVEVL.gen.td"

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@ -2,6 +2,9 @@
// Define intrinsics written by hand // Define intrinsics written by hand
// SVOB pattern.
def : Pat<(int_ve_vl_svob), (SVOB)>;
// The lsv and lvs patterns // The lsv and lvs patterns
def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz), def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz),
(LSVrr_v (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32), (LSVrr_v (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32),

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@ -0,0 +1,19 @@
; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
;;; Test set vector out-of-order memory access boundary intrinsic instructions
;;;
;;; Note:
;;; We test SVOB instruction.
; Function Attrs: nounwind
define fastcc void @svob_svob() {
; CHECK-LABEL: svob_svob:
; CHECK: # %bb.0:
; CHECK-NEXT: svob
; CHECK-NEXT: b.l.t (, %s10)
tail call void @llvm.ve.vl.svob()
ret void
}
; Function Attrs: nounwind
declare void @llvm.ve.vl.svob()