forked from OSchip/llvm-project
[LiveRegUnits] Add phys_regs_and_masks iterator range (NFC).
This iterator range just includes physical registers and register masks, which are interesting when dealing with register liveness. Reviewers: evandro, t.p.northover, paquette, MatzeB, arsenm Reviewed By: paquette Differential Revision: https://reviews.llvm.org/D70562
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@ -160,6 +160,19 @@ private:
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void addPristines(const MachineFunction &MF);
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};
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/// Returns an iterator range over all physical register and mask operands for
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/// \p MI and bundled instructions. This also skips any debug operands.
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inline iterator_range<filter_iterator<
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ConstMIBundleOperands, std::function<bool(const MachineOperand &)>>>
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phys_regs_and_masks(const MachineInstr &MI) {
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std::function<bool(const MachineOperand &)> Pred =
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[](const MachineOperand &MOP) {
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return MOP.isRegMask() || (MOP.isReg() && !MOP.isDebug() &&
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Register::isPhysicalRegister(MOP.getReg()));
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};
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return make_filter_range(const_mi_bundle_ops(MI), Pred);
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}
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} // end namespace llvm
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#endif // LLVM_CODEGEN_LIVEREGUNITS_H
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@ -13,6 +13,7 @@
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LivePhysRegs.h"
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#include "llvm/CodeGen/LiveRegUnits.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBundle.h"
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@ -42,28 +43,23 @@ void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
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/// Remove defined registers and regmask kills from the set.
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void LivePhysRegs::removeDefs(const MachineInstr &MI) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (!O->isDef() || O->isDebug())
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continue;
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Register Reg = O->getReg();
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if (!Register::isPhysicalRegister(Reg))
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continue;
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removeReg(Reg);
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} else if (O->isRegMask())
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removeRegsInMask(*O);
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for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
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if (MOP.isRegMask()) {
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removeRegsInMask(MOP);
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continue;
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}
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if (MOP.isDef())
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removeReg(MOP.getReg());
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}
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}
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/// Add uses to the set.
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void LivePhysRegs::addUses(const MachineInstr &MI) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (!O->isReg() || !O->readsReg() || O->isDebug())
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for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
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if (!MOP.isReg() || !MOP.readsReg())
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continue;
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Register Reg = O->getReg();
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if (!Register::isPhysicalRegister(Reg))
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continue;
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addReg(Reg);
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addReg(MOP.getReg());
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}
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}
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@ -43,41 +43,34 @@ void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
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void LiveRegUnits::stepBackward(const MachineInstr &MI) {
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// Remove defined registers and regmask kills from the set.
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (!O->isDef() || O->isDebug())
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continue;
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Register Reg = O->getReg();
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if (!Register::isPhysicalRegister(Reg))
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continue;
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removeReg(Reg);
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} else if (O->isRegMask())
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removeRegsNotPreserved(O->getRegMask());
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for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
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if (MOP.isRegMask()) {
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removeRegsNotPreserved(MOP.getRegMask());
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continue;
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}
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if (MOP.isDef())
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removeReg(MOP.getReg());
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}
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// Add uses to the set.
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (!O->isReg() || !O->readsReg() || O->isDebug())
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for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
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if (!MOP.isReg() || !MOP.readsReg())
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continue;
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Register Reg = O->getReg();
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if (!Register::isPhysicalRegister(Reg))
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continue;
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addReg(Reg);
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addReg(MOP.getReg());
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}
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}
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void LiveRegUnits::accumulate(const MachineInstr &MI) {
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// Add defs, uses and regmask clobbers to the set.
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (O->isReg()) {
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Register Reg = O->getReg();
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if (!Register::isPhysicalRegister(Reg))
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continue;
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if (!O->isDef() && !O->readsReg())
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continue;
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addReg(Reg);
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} else if (O->isRegMask())
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addRegsInMask(O->getRegMask());
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for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
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if (MOP.isRegMask()) {
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addRegsInMask(MOP.getRegMask());
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continue;
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}
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if (!MOP.isDef() && !MOP.readsReg())
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continue;
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addReg(MOP.getReg());
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}
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}
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