forked from OSchip/llvm-project
AMDGPU/SI: Remove unused outs parameter from VOPC TableGen classes
Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11809 llvm-svn: 244321
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@ -1614,7 +1614,7 @@ let isCodeGenOnly = 0 in {
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} // End isCodeGenOnly = 0
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}
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class VOPC_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> :
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class VOPC_Pseudo <dag ins, list<dag> pattern, string opName> :
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VOPCCommon <ins, "", pattern>,
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VOP <opName>,
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SIMCInstr<opName#"_e32", SISubtarget.NONE>,
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@ -1623,9 +1623,9 @@ class VOPC_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> :
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let isCodeGenOnly = 1;
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}
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multiclass VOPC_m <vopc op, dag outs, dag ins, string asm, list<dag> pattern,
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multiclass VOPC_m <vopc op, dag ins, string asm, list<dag> pattern,
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string opName, bit DefExec, string revOpName = ""> {
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def "" : VOPC_Pseudo <outs, ins, pattern, opName>;
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def "" : VOPC_Pseudo <ins, pattern, opName>;
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def _si : VOPC<op.SI, ins, asm, []>,
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SIMCInstr <opName#"_e32", SISubtarget.SI> {
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@ -1644,7 +1644,7 @@ multiclass VOPC_Helper <vopc op, string opName,
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dag ins32, string asm32, list<dag> pat32,
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dag out64, dag ins64, string asm64, list<dag> pat64,
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bit HasMods, bit DefExec, string revOp> {
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defm _e32 : VOPC_m <op, (outs), ins32, opName#asm32, pat32, opName, DefExec>;
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defm _e32 : VOPC_m <op, ins32, opName#asm32, pat32, opName, DefExec>;
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defm _e64 : VOP3_C_m <op, out64, ins64, opName#asm64, pat64,
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opName, HasMods, DefExec, revOp>;
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@ -1656,7 +1656,7 @@ multiclass VOPC_Class_Helper <vopc op, string opName,
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dag ins32, string asm32, list<dag> pat32,
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dag out64, dag ins64, string asm64, list<dag> pat64,
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bit HasMods, bit DefExec, string revOp> {
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defm _e32 : VOPC_m <op, (outs), ins32, opName#asm32, pat32, opName, DefExec>;
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defm _e32 : VOPC_m <op, ins32, opName#asm32, pat32, opName, DefExec>;
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defm _e64 : VOP3_C_m <op, out64, ins64, opName#asm64, pat64,
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opName, HasMods, DefExec, revOp>,
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