forked from OSchip/llvm-project
[X86][SSE] Add PTEST test cases for PR45378
This commit is contained in:
Simon Pilgrim
parent
70d77b5f8b
commit
11baa6ff09
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512F
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512BW
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declare i64 @llvm.experimental.vector.reduce.or.v2i64(<2 x i64>)
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declare void @TrapFunc(i64)
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define void @parseHeaders(i64 * %ptr) {
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; SSE2-LABEL: parseHeaders:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pushq %rax
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; SSE2-NEXT: .cfi_def_cfa_offset 16
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; SSE2-NEXT: movdqu (%rdi), %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
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; SSE2-NEXT: por %xmm0, %xmm1
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; SSE2-NEXT: movq %xmm1, %rax
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; SSE2-NEXT: testq %rax, %rax
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; SSE2-NEXT: je .LBB0_2
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; SSE2-NEXT: # %bb.1: # %trap
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; SSE2-NEXT: movq %xmm0, %rdi
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; SSE2-NEXT: callq TrapFunc
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; SSE2-NEXT: .LBB0_2: # %ret
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; SSE2-NEXT: popq %rax
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; SSE2-NEXT: .cfi_def_cfa_offset 8
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: parseHeaders:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pushq %rax
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; SSE41-NEXT: .cfi_def_cfa_offset 16
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; SSE41-NEXT: movdqu (%rdi), %xmm0
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; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
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; SSE41-NEXT: por %xmm0, %xmm1
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; SSE41-NEXT: movq %xmm1, %rax
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; SSE41-NEXT: testq %rax, %rax
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; SSE41-NEXT: je .LBB0_2
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; SSE41-NEXT: # %bb.1: # %trap
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; SSE41-NEXT: pextrq $1, %xmm0, %rdi
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; SSE41-NEXT: callq TrapFunc
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; SSE41-NEXT: .LBB0_2: # %ret
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; SSE41-NEXT: popq %rax
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; SSE41-NEXT: .cfi_def_cfa_offset 8
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: parseHeaders:
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; AVX1: # %bb.0:
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; AVX1-NEXT: pushq %rax
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; AVX1-NEXT: .cfi_def_cfa_offset 16
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; AVX1-NEXT: vmovdqu (%rdi), %xmm0
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; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
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; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm1
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; AVX1-NEXT: vmovq %xmm1, %rax
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; AVX1-NEXT: testq %rax, %rax
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; AVX1-NEXT: je .LBB0_2
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; AVX1-NEXT: # %bb.1: # %trap
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; AVX1-NEXT: vpextrq $1, %xmm0, %rdi
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; AVX1-NEXT: callq TrapFunc
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; AVX1-NEXT: .LBB0_2: # %ret
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; AVX1-NEXT: popq %rax
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; AVX1-NEXT: .cfi_def_cfa_offset 8
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: parseHeaders:
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; AVX2: # %bb.0:
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; AVX2-NEXT: pushq %rax
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; AVX2-NEXT: .cfi_def_cfa_offset 16
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; AVX2-NEXT: vmovdqu (%rdi), %xmm0
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; AVX2-NEXT: vpbroadcastq 8(%rdi), %xmm1
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; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vmovq %xmm1, %rax
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; AVX2-NEXT: testq %rax, %rax
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; AVX2-NEXT: je .LBB0_2
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; AVX2-NEXT: # %bb.1: # %trap
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; AVX2-NEXT: vpextrq $1, %xmm0, %rdi
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; AVX2-NEXT: callq TrapFunc
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; AVX2-NEXT: .LBB0_2: # %ret
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; AVX2-NEXT: popq %rax
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; AVX2-NEXT: .cfi_def_cfa_offset 8
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: parseHeaders:
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; AVX512: # %bb.0:
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; AVX512-NEXT: pushq %rax
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; AVX512-NEXT: .cfi_def_cfa_offset 16
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; AVX512-NEXT: vmovdqu (%rdi), %xmm0
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; AVX512-NEXT: vpbroadcastq 8(%rdi), %xmm1
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; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm1
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; AVX512-NEXT: vmovq %xmm1, %rax
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; AVX512-NEXT: testq %rax, %rax
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; AVX512-NEXT: je .LBB0_2
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; AVX512-NEXT: # %bb.1: # %trap
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; AVX512-NEXT: vpextrq $1, %xmm0, %rdi
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; AVX512-NEXT: callq TrapFunc
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; AVX512-NEXT: .LBB0_2: # %ret
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; AVX512-NEXT: popq %rax
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; AVX512-NEXT: .cfi_def_cfa_offset 8
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; AVX512-NEXT: retq
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%vptr = bitcast i64 * %ptr to <2 x i64> *
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%vload = load <2 x i64>, <2 x i64> * %vptr, align 8
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%vreduce = call i64 @llvm.experimental.vector.reduce.or.v2i64(<2 x i64> %vload)
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%vcheck = icmp eq i64 %vreduce, 0
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br i1 %vcheck, label %ret, label %trap
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trap:
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%v2 = extractelement <2 x i64> %vload, i32 1
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call void @TrapFunc(i64 %v2)
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ret void
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ret:
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ret void
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}
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define void @parseHeaders2_scalar_or(i64 * %ptr) {
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; SSE2-LABEL: parseHeaders2_scalar_or:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pushq %rax
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; SSE2-NEXT: .cfi_def_cfa_offset 16
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; SSE2-NEXT: movdqu (%rdi), %xmm0
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; SSE2-NEXT: movq %xmm0, %rax
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; SSE2-NEXT: movq %xmm0, %rdi
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; SSE2-NEXT: orq %rdi, %rax
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; SSE2-NEXT: je .LBB1_2
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; SSE2-NEXT: # %bb.1: # %trap
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; SSE2-NEXT: callq TrapFunc
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; SSE2-NEXT: .LBB1_2: # %ret
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; SSE2-NEXT: popq %rax
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; SSE2-NEXT: .cfi_def_cfa_offset 8
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: parseHeaders2_scalar_or:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pushq %rax
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; SSE41-NEXT: .cfi_def_cfa_offset 16
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; SSE41-NEXT: movdqu (%rdi), %xmm0
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; SSE41-NEXT: ptest %xmm0, %xmm0
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; SSE41-NEXT: je .LBB1_2
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; SSE41-NEXT: # %bb.1: # %trap
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; SSE41-NEXT: pextrq $1, %xmm0, %rdi
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; SSE41-NEXT: callq TrapFunc
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; SSE41-NEXT: .LBB1_2: # %ret
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; SSE41-NEXT: popq %rax
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; SSE41-NEXT: .cfi_def_cfa_offset 8
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: parseHeaders2_scalar_or:
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; AVX: # %bb.0:
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; AVX-NEXT: pushq %rax
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; AVX-NEXT: .cfi_def_cfa_offset 16
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; AVX-NEXT: vmovdqu (%rdi), %xmm0
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; AVX-NEXT: vptest %xmm0, %xmm0
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; AVX-NEXT: je .LBB1_2
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; AVX-NEXT: # %bb.1: # %trap
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; AVX-NEXT: vpextrq $1, %xmm0, %rdi
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; AVX-NEXT: callq TrapFunc
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; AVX-NEXT: .LBB1_2: # %ret
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; AVX-NEXT: popq %rax
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; AVX-NEXT: .cfi_def_cfa_offset 8
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; AVX-NEXT: retq
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%vptr = bitcast i64 * %ptr to <2 x i64> *
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%vload = load <2 x i64>, <2 x i64> * %vptr, align 8
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%v1 = extractelement <2 x i64> %vload, i32 0
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%v2 = extractelement <2 x i64> %vload, i32 1
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%vreduce = or i64 %v1, %v2
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%vcheck = icmp eq i64 %vreduce, 0
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br i1 %vcheck, label %ret, label %trap
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trap:
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call void @TrapFunc(i64 %v2)
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ret void
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ret:
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ret void
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}
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define void @parseHeaders2_scalar_and(i64 * %ptr) {
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; SSE2-LABEL: parseHeaders2_scalar_and:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pushq %rax
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; SSE2-NEXT: .cfi_def_cfa_offset 16
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; SSE2-NEXT: movdqu (%rdi), %xmm0
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; SSE2-NEXT: movq %xmm0, %rax
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; SSE2-NEXT: movq %xmm0, %rdi
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; SSE2-NEXT: testq %rdi, %rax
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; SSE2-NEXT: je .LBB2_2
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; SSE2-NEXT: # %bb.1: # %trap
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; SSE2-NEXT: callq TrapFunc
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; SSE2-NEXT: .LBB2_2: # %ret
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; SSE2-NEXT: popq %rax
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; SSE2-NEXT: .cfi_def_cfa_offset 8
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: parseHeaders2_scalar_and:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pushq %rax
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; SSE41-NEXT: .cfi_def_cfa_offset 16
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; SSE41-NEXT: movdqu (%rdi), %xmm0
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; SSE41-NEXT: movq %xmm0, %rax
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; SSE41-NEXT: pextrq $1, %xmm0, %rdi
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; SSE41-NEXT: testq %rdi, %rax
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; SSE41-NEXT: je .LBB2_2
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; SSE41-NEXT: # %bb.1: # %trap
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; SSE41-NEXT: callq TrapFunc
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; SSE41-NEXT: .LBB2_2: # %ret
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; SSE41-NEXT: popq %rax
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; SSE41-NEXT: .cfi_def_cfa_offset 8
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: parseHeaders2_scalar_and:
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; AVX: # %bb.0:
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; AVX-NEXT: pushq %rax
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; AVX-NEXT: .cfi_def_cfa_offset 16
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; AVX-NEXT: vmovdqu (%rdi), %xmm0
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; AVX-NEXT: vmovq %xmm0, %rax
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; AVX-NEXT: vpextrq $1, %xmm0, %rdi
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; AVX-NEXT: testq %rdi, %rax
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; AVX-NEXT: je .LBB2_2
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; AVX-NEXT: # %bb.1: # %trap
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; AVX-NEXT: callq TrapFunc
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; AVX-NEXT: .LBB2_2: # %ret
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; AVX-NEXT: popq %rax
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; AVX-NEXT: .cfi_def_cfa_offset 8
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; AVX-NEXT: retq
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%vptr = bitcast i64 * %ptr to <2 x i64> *
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%vload = load <2 x i64>, <2 x i64> * %vptr, align 8
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%v1 = extractelement <2 x i64> %vload, i32 0
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%v2 = extractelement <2 x i64> %vload, i32 1
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%vreduce = and i64 %v1, %v2
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%vcheck = icmp eq i64 %vreduce, 0
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br i1 %vcheck, label %ret, label %trap
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trap:
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call void @TrapFunc(i64 %v2)
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ret void
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ret:
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ret void
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}
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