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Add PPC64 mulli pattern 

The PPC backend had been missing a pattern to generate mulli for 64-bit
multiples. We had been generating it only for 32-bit multiplies. Unfortunately,
generating li + mulld unnecessarily increases register pressure.

llvm-svn: 187807
This commit is contained in:
Hal Finkel 2013-08-06 17:03:03 +00:00
parent 340c780dd6
commit 11b9e452f6
2 changed files with 19 additions and 0 deletions
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3
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
View File

@ -542,6 +542,9 @@ defm DIVDU : XOForm_1r<31, 457, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
defm MULLD : XOForm_1r<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
"mulld", "$rT, $rA, $rB", IntMulHD,
[(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
def MULLI8 : DForm_2<7, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm),
"mulli $rD, $rA, $imm", IntMulLI,
[(set i64:$rD, (mul i64:$rA, imm64SExt16:$imm))]>;
}
let neverHasSideEffects = 1 in {

16
llvm/test/CodeGen/PowerPC/mulli64.ll Normal file
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@ -0,0 +1,16 @@
; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
define i64 @foo(i64 %a) #0 {
entry:
%mul = mul nsw i64 %a, 3
ret i64 %mul
}
; CHECK-LABEL: @foo
; CHECK: mulli 3, 3, 3
; CHECK: blr
attributes #0 = { nounwind readnone }