forked from OSchip/llvm-project
TableGen subtarget emitter. Remove unnecessary header dependence.
llvm-svn: 164094
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bac8168fb3
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@ -14,15 +14,16 @@
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#ifndef LLVM_TARGET_TARGETSUBTARGETINFO_H
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#define LLVM_TARGET_TARGETSUBTARGETINFO_H
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#include "llvm/CodeGen/TargetSchedule.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/CodeGen.h"
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namespace llvm {
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class MachineInstr;
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class SDep;
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class SUnit;
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class TargetRegisterClass;
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class TargetSchedModel;
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template <typename T> class SmallVectorImpl;
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//===----------------------------------------------------------------------===//
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@ -44,13 +45,13 @@ public:
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virtual ~TargetSubtargetInfo();
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/// Initialize a copy of the scheduling model for this subtarget.
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/// TargetSchedModel provides the interface for the subtarget's
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/// instruction scheduling information.
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void initSchedModel(TargetSchedModel &SchedModel,
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const TargetInstrInfo *TII) const {
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// getSchedModel returns the static MCSchedModel initialized by InitMCSubtargetInfo.
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SchedModel.init(*getSchedModel(), this, TII);
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/// Resolve a SchedClass at runtime, where SchedClass identifies an
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/// MCSchedClassDesc with the isVariant property. This may return the ID of
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/// another variant SchedClass, but repeated invocation must quickly terminate
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/// in a nonvariant SchedClass.
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virtual unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *MI,
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const TargetSchedModel* SchedModel) const {
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return 0;
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}
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/// getSpecialAddressLatency - For targets where it is beneficial to
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@ -1248,6 +1248,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
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OS << "\n#ifdef GET_SUBTARGETINFO_CTOR\n";
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OS << "#undef GET_SUBTARGETINFO_CTOR\n";
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OS << "#include \"llvm/CodeGen/TargetSchedule.h\"\n";
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OS << "namespace llvm {\n";
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OS << "extern const llvm::SubtargetFeatureKV " << Target << "FeatureKV[];\n";
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OS << "extern const llvm::SubtargetFeatureKV " << Target << "SubTypeKV[];\n";
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