forked from OSchip/llvm-project
R600/SI: Add a MUBUF load pattern for Reg+Imm offsets
llvm-svn: 200933
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044e418f15
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11624bc577
llvm
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@ -1959,6 +1959,11 @@ defm : SMRD_Pattern <S_LOAD_DWORDX16_IMM, S_LOAD_DWORDX16_SGPR, v16i32>;
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multiclass MUBUFLoad_Pattern <MUBUF Instr_ADDR64, ValueType vt,
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PatFrag global_ld, PatFrag constant_ld> {
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def : Pat <
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(vt (global_ld (add (add i64:$ptr, i64:$offset), IMM12bit:$imm_offset))),
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(Instr_ADDR64 (SI_ADDR64_RSRC $ptr), $offset, (as_i16imm $imm_offset))
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>;
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def : Pat <
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(vt (global_ld (add i64:$ptr, (i64 IMM12bit:$offset)))),
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(Instr_ADDR64 (SI_ADDR64_RSRC (i64 0)), $ptr, (as_i16imm $offset))
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@ -0,0 +1,51 @@
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; RUN: llc < %s -march=r600 -mcpu=SI -show-mc-encoding -verify-machineinstrs | FileCheck %s
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;;;==========================================================================;;;
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;;; MUBUF LOAD TESTS
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;;;==========================================================================;;;
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; MUBUF load with an immediate byte offset that fits into 12-bits
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; CHECK-LABEL: @mubuf_load0
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; CHECK: BUFFER_LOAD_DWORD v{{[0-9]}}, s[{{[0-9]:[0-9]}}] + v[{{[0-9]:[0-9]}}] + 4 ; encoding: [0x04,0x80
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define void @mubuf_load0(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%0 = getelementptr i32 addrspace(1)* %in, i64 1
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%1 = load i32 addrspace(1)* %0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; MUBUF load with the largest possible immediate offset
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; CHECK-LABEL: @mubuf_load1
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; CHECK: BUFFER_LOAD_UBYTE v{{[0-9]}}, s[{{[0-9]:[0-9]}}] + v[{{[0-9]:[0-9]}}] + 4095 ; encoding: [0xff,0x8f
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define void @mubuf_load1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) {
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entry:
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%0 = getelementptr i8 addrspace(1)* %in, i64 4095
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%1 = load i8 addrspace(1)* %0
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store i8 %1, i8 addrspace(1)* %out
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ret void
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}
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; MUBUF load with an immediate byte offset that doesn't fit into 12-bits
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; CHECK-LABEL: @mubuf_load2
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; CHECK: BUFFER_LOAD_DWORD v{{[0-9]}}, s[{{[0-9]:[0-9]}}] + v[{{[0-9]:[0-9]}}] + 0 ; encoding: [0x00,0x80
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define void @mubuf_load2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%0 = getelementptr i32 addrspace(1)* %in, i64 1024
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%1 = load i32 addrspace(1)* %0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; MUBUF load with a 12-bit immediate offset and a register offset
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; CHECK-LABEL: @mubuf_load3
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; CHECK-NOT: ADD
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; CHECK: BUFFER_LOAD_DWORD v{{[0-9]}}, s[{{[0-9]:[0-9]}}] + v[{{[0-9]:[0-9]}}] + 4 ; encoding: [0x04,0x80
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define void @mubuf_load3(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i64 %offset) {
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entry:
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%0 = getelementptr i32 addrspace(1)* %in, i64 %offset
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%1 = getelementptr i32 addrspace(1)* %0, i64 1
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%2 = load i32 addrspace(1)* %1
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store i32 %2, i32 addrspace(1)* %out
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ret void
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}
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