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Simplify POSIXThread register context handling 

This seems a little more straightforward and is equivalent to r201457
for ELF core files.  A case for FreeBSD i386 is also added (it was
incorrectly using the 64-bit register context and corrupting mememory).

Better (user-facing) error handling is still needed.

Review: http://llvm-reviews.chandlerc.com/D2765
llvm-svn: 202549
This commit is contained in:
Ed Maste 2014-02-28 22:15:58 +00:00
parent 6e390fae4b
commit 111387c47b
1 changed files with 41 additions and 33 deletions
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74
lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
View File

@ -156,40 +156,34 @@ POSIXThread::GetRegisterContext()
RegisterInfoInterface *reg_interface = NULL;
const ArchSpec &target_arch = GetProcess()->GetTarget().GetArchitecture();
switch (target_arch.GetCore())
switch (target_arch.GetTriple().getOS())
{
case ArchSpec::eCore_mips64:
{
switch (target_arch.GetTriple().getOS())
case llvm::Triple::FreeBSD:
switch (target_arch.GetCore())
{
case llvm::Triple::FreeBSD:
case ArchSpec::eCore_mips64:
reg_interface = new RegisterContextFreeBSD_mips64(target_arch);
break;
default:
assert(false && "OS not supported");
case ArchSpec::eCore_x86_32_i386:
case ArchSpec::eCore_x86_32_i486:
case ArchSpec::eCore_x86_32_i486sx:
reg_interface = new RegisterContextFreeBSD_i386(target_arch);
break;
}
if (reg_interface)
{
RegisterContextPOSIXProcessMonitor_mips64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_mips64(*this, 0, reg_interface);
m_posix_thread = reg_ctx;
m_reg_context_sp.reset(reg_ctx);
}
break;
}
case ArchSpec::eCore_x86_32_i386:
case ArchSpec::eCore_x86_32_i486:
case ArchSpec::eCore_x86_32_i486sx:
case ArchSpec::eCore_x86_64_x86_64:
{
switch (target_arch.GetTriple().getOS())
{
case llvm::Triple::FreeBSD:
case ArchSpec::eCore_x86_64_x86_64:
reg_interface = new RegisterContextFreeBSD_x86_64(target_arch);
break;
case llvm::Triple::Linux:
default:
break;
}
break;
case llvm::Triple::Linux:
switch (target_arch.GetCore())
{
case ArchSpec::eCore_x86_32_i386:
case ArchSpec::eCore_x86_32_i486:
case ArchSpec::eCore_x86_32_i486sx:
case ArchSpec::eCore_x86_64_x86_64:
if (Host::GetArchitecture().GetAddressByteSize() == 4)
{
// 32-bit hosts run with a RegisterContextLinux_i386 context.
@ -203,21 +197,35 @@ POSIXThread::GetRegisterContext()
}
break;
default:
assert(false && "OS not supported");
break;
}
if (reg_interface)
default:
break;
}
assert(reg_interface && "OS or CPU not supported!");
switch (target_arch.GetCore())
{
case ArchSpec::eCore_mips64:
{
RegisterContextPOSIXProcessMonitor_mips64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_mips64(*this, 0, reg_interface);
m_posix_thread = reg_ctx;
m_reg_context_sp.reset(reg_ctx);
break;
}
case ArchSpec::eCore_x86_32_i386:
case ArchSpec::eCore_x86_32_i486:
case ArchSpec::eCore_x86_32_i486sx:
case ArchSpec::eCore_x86_64_x86_64:
{
RegisterContextPOSIXProcessMonitor_x86_64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_x86_64(*this, 0, reg_interface);
m_posix_thread = reg_ctx;
m_reg_context_sp.reset(reg_ctx);
break;
}
break;
}
default:
assert(false && "CPU type not supported!");
break;
}
}