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AMDGPU: Fix counting si_mask_branch as 4 bytes 

llvm-svn: 285202
This commit is contained in:
Matt Arsenault 2016-10-26 14:53:54 +00:00
parent 8fac501602
commit 1110f14b42
2 changed files with 1 additions and 1 deletions
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1
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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@ -3504,6 +3504,7 @@ unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
} }
switch (Opc) { switch (Opc) {
case AMDGPU::SI_MASK_BRANCH:
case TargetOpcode::IMPLICIT_DEF: case TargetOpcode::IMPLICIT_DEF:
case TargetOpcode::KILL: case TargetOpcode::KILL:
case TargetOpcode::DBG_VALUE: case TargetOpcode::DBG_VALUE:

1
llvm/lib/Target/AMDGPU/SIInstructions.td
View File

@ -147,7 +147,6 @@ def SI_MASK_BRANCH : PseudoInstSI <
let isBranch = 0; let isBranch = 0;
let isTerminator = 1; let isTerminator = 1;
let isBarrier = 0; let isBarrier = 0;
let SALU = 1;
let Uses = [EXEC]; let Uses = [EXEC];
let SchedRW = []; let SchedRW = [];
let hasNoSchedulingInfo = 1; let hasNoSchedulingInfo = 1;