forked from OSchip/llvm-project
Second set of ARM/MC/ELF changes.
Added ARM specific ELF section types. Added AttributesSection to ARMElfTargetObject First step in unifying .cpu assembly tag with ELF/.o llc now asserts on actual ELF emission on -filetype=obj :-) llvm-svn: 116257
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@ -121,7 +121,18 @@ public:
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// referenced symbol table contain the escape value SHN_XINDEX
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SHT_SYMTAB_SHNDX = 0x12U,
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LAST_KNOWN_SECTION_TYPE = SHT_SYMTAB_SHNDX
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// Start of target-specific flags.
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// Exception Index table
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SHT_ARM_EXIDX = 0x70000001U,
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// BPABI DLL dynamic linking pre-emption map
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SHT_ARM_PREEMPTMAP = 0x70000002U,
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// Object file compatibility attributes
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SHT_ARM_ATTRIBUTES = 0x70000003U,
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SHT_ARM_DEBUGOVERLAY = 0x70000004U,
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SHT_ARM_OVERLAYSECTION = 0x70000005U,
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LAST_KNOWN_SECTION_TYPE = SHT_ARM_OVERLAYSECTION
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};
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/// Valid section flags.
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@ -21,6 +21,7 @@
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#include "ARMMachineFunctionInfo.h"
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#include "ARMMCInstLower.h"
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#include "ARMTargetMachine.h"
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#include "ARMTargetObjectFile.h"
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#include "llvm/Analysis/DebugInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Module.h"
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@ -30,7 +31,6 @@
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#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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@ -110,8 +110,12 @@ namespace {
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private:
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// Helpers for EmitStartOfAsmFile() and EmitEndOfAsmFile()
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void emitAttributes();
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void emitTextAttribute(ARMBuildAttrs::SpecialAttr attr, StringRef v);
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void emitAttribute(ARMBuildAttrs::AttrType attr, int v);
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// Helper for ELF .o only
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void emitARMAttributeSection();
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public:
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void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
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@ -495,12 +499,11 @@ void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
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// Instead of subclassing the MCELFStreamer, we do the work here.
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void ARMAsmPrinter::emitAttributes() {
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// FIXME: Add in ELF specific section handling here.
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// FIXME: unify this: .cpu and CPUString with enum attributes
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emitARMAttributeSection();
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std::string CPUString = Subtarget->getCPUString();
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if (CPUString != "generic")
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OutStreamer.EmitRawText("\t.cpu " + Twine(CPUString));
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emitTextAttribute(ARMBuildAttrs::SEL_CPU, CPUString);
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// FIXME: Emit FPU type
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if (Subtarget->hasVFP2())
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@ -529,6 +532,26 @@ void ARMAsmPrinter::emitAttributes() {
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// FIXME: Should we signal R9 usage?
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}
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void ARMAsmPrinter::emitARMAttributeSection() {
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// <format-version>
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// [ <section-length> "vendor-name"
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// [ <file-tag> <size> <attribute>*
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// | <section-tag> <size> <section-number>* 0 <attribute>*
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// | <symbol-tag> <size> <symbol-number>* 0 <attribute>*
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// ]+
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// ]*
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if (OutStreamer.hasRawTextSupport())
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return;
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const ARMElfTargetObjectFile &TLOFELF =
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static_cast<const ARMElfTargetObjectFile &>
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(getObjFileLowering());
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OutStreamer.SwitchSection(TLOFELF.getAttributesSection());
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// Fixme: Still more to do here.
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}
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void ARMAsmPrinter::emitAttribute(ARMBuildAttrs::AttrType attr, int v) {
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if (OutStreamer.hasRawTextSupport()) {
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OutStreamer.EmitRawText("\t.eabi_attribute " +
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@ -539,6 +562,21 @@ void ARMAsmPrinter::emitAttribute(ARMBuildAttrs::AttrType attr, int v) {
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}
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}
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void ARMAsmPrinter::emitTextAttribute(ARMBuildAttrs::SpecialAttr attr,
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StringRef val) {
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switch (attr) {
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default: assert(0 && "Unimplemented ARMBuildAttrs::SpecialAttr"); break;
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case ARMBuildAttrs::SEL_CPU:
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if (OutStreamer.hasRawTextSupport()) {
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if (val != "generic") {
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OutStreamer.EmitRawText("\t.cpu " + val);
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}
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} else {
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// FIXME: ELF
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}
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}
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}
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//===----------------------------------------------------------------------===//
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static MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber,
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@ -16,7 +16,14 @@
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#define __TARGET_ARMBUILDATTRS_H__
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namespace ARMBuildAttrs {
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enum SpecialAttr {
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// This is for the .cpu asm attr. It translates into one or more
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// AttrType (below) entries in the .ARM.attributes section in the ELF.
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SEL_CPU
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};
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enum AttrType {
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// Rest correspond to ELF/.ARM.attributes
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File = 1,
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Section = 2,
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Symbol = 3,
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@ -59,6 +66,11 @@ namespace ARMBuildAttrs {
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Virtualization_use = 68,
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MPextension_use = 70
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};
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// Magic numbers for .ARM.attributes
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enum AttrMagic {
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Format_Version = 0x41
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};
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}
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#endif // __TARGET_ARMBUILDATTRS_H__
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@ -36,4 +36,10 @@ void ARMElfTargetObjectFile::Initialize(MCContext &Ctx,
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MCSectionELF::SHF_ALLOC,
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SectionKind::getDataRel());
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}
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AttributesSection =
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getContext().getELFSection(".ARM.attributes",
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MCSectionELF::SHT_ARM_ATTRIBUTES,
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0,
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SectionKind::getMetadata());
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}
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@ -18,10 +18,19 @@ class MCContext;
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class TargetMachine;
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class ARMElfTargetObjectFile : public TargetLoweringObjectFileELF {
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protected:
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const MCSection *AttributesSection;
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public:
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ARMElfTargetObjectFile() : TargetLoweringObjectFileELF() {}
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ARMElfTargetObjectFile() :
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TargetLoweringObjectFileELF(),
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AttributesSection(NULL)
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{}
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virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
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virtual const MCSection *getAttributesSection() const {
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return AttributesSection;
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}
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};
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} // end namespace llvm
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