forked from OSchip/llvm-project
R600/SI: Handle physical registers in getOpRegClass
llvm-svn: 224079
This commit is contained in:
parent
e368cb378f
commit
102a70409e
|
@ -1242,8 +1242,13 @@ const TargetRegisterClass *SIInstrInfo::getOpRegClass(const MachineInstr &MI,
|
|||
const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
|
||||
const MCInstrDesc &Desc = get(MI.getOpcode());
|
||||
if (MI.isVariadic() || OpNo >= Desc.getNumOperands() ||
|
||||
Desc.OpInfo[OpNo].RegClass == -1)
|
||||
return MRI.getRegClass(MI.getOperand(OpNo).getReg());
|
||||
Desc.OpInfo[OpNo].RegClass == -1) {
|
||||
unsigned Reg = MI.getOperand(OpNo).getReg();
|
||||
|
||||
if (TargetRegisterInfo::isVirtualRegister(Reg))
|
||||
return MRI.getRegClass(Reg);
|
||||
return RI.getRegClass(Reg);
|
||||
}
|
||||
|
||||
unsigned RCID = Desc.OpInfo[OpNo].RegClass;
|
||||
return RI.getRegClass(RCID);
|
||||
|
|
Loading…
Reference in New Issue