Dummy MSP430 backend

llvm-svn: 70694
This commit is contained in:
Anton Korobeynikov 2009-05-03 12:57:15 +00:00
parent 7bee415836
commit 101380015c
21 changed files with 995 additions and 1 deletions

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@ -226,6 +226,7 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch],
mips-*) llvm_cv_target_arch="Mips" ;; mips-*) llvm_cv_target_arch="Mips" ;;
pic16-*) llvm_cv_target_arch="PIC16" ;; pic16-*) llvm_cv_target_arch="PIC16" ;;
xcore-*) llvm_cv_target_arch="XCore" ;; xcore-*) llvm_cv_target_arch="XCore" ;;
msp430-*) llvm_cv_target_arch="MSP430" ;;
*) llvm_cv_target_arch="Unknown" ;; *) llvm_cv_target_arch="Unknown" ;;
esac]) esac])
@ -343,6 +344,7 @@ else
Mips) AC_SUBST(TARGET_HAS_JIT,0) ;; Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;; PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;; XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
*) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;;
esac esac
fi fi
@ -392,7 +394,7 @@ AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
[Build specific host targets: all,host-only,{target-name} (default=all)]),, [Build specific host targets: all,host-only,{target-name} (default=all)]),,
enableval=all) enableval=all)
case "$enableval" in case "$enableval" in
all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore CBackend MSIL CppBackend" ;; all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore MSP430 CBackend MSIL CppBackend" ;;
host-only) host-only)
case "$llvm_cv_target_arch" in case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86" ;; x86) TARGETS_TO_BUILD="X86" ;;
@ -406,6 +408,7 @@ case "$enableval" in
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;; CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
PIC16) TARGETS_TO_BUILD="PIC16" ;; PIC16) TARGETS_TO_BUILD="PIC16" ;;
XCore) TARGETS_TO_BUILD="XCore" ;; XCore) TARGETS_TO_BUILD="XCore" ;;
MSP430) TARGETS_TO_BUILD="MSP430" ;;
*) AC_MSG_ERROR([Can not set target to build]) ;; *) AC_MSG_ERROR([Can not set target to build]) ;;
esac esac
;; ;;
@ -422,6 +425,7 @@ case "$enableval" in
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;; pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;; msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;

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@ -0,0 +1,36 @@
//==-- MSP430.h - Top-level interface for MSP430 representation --*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the entry points for global functions defined in
// the LLVM MSP430 backend.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_MSP430_H
#define LLVM_TARGET_MSP430_H
namespace llvm {
class MSP430TargetMachine;
class FunctionPass;
class raw_ostream;
FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM);
FunctionPass *createMSP430CodePrinterPass(raw_ostream &OS,
MSP430TargetMachine &TM,
bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for MSP430 registers.
// This defines a mapping from register name to register number.
#include "MSP430GenRegisterNames.inc"
// Defines symbolic names for the MSP430 instructions.
#include "MSP430GenInstrNames.inc"
#endif

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@ -0,0 +1,54 @@
//===- MSP430.td - Describe the MSP430 Target Machine ---------*- tblgen -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
// This is the top level entry point for the MSP430 target.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces
//===----------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===----------------------------------------------------------------------===//
// Subtarget Features.
//===----------------------------------------------------------------------===//
def FeatureX
: SubtargetFeature<"ext", "ExtendedInsts", "true",
"Enable MSP430-X extensions">;
//===----------------------------------------------------------------------===//
// MSP430 supported processors.
//===----------------------------------------------------------------------===//
class Proc<string Name, list<SubtargetFeature> Features>
: Processor<Name, NoItineraries, Features>;
def : Proc<"generic", []>;
//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//
include "MSP430RegisterInfo.td"
//===----------------------------------------------------------------------===//
// Instruction Descriptions
//===----------------------------------------------------------------------===//
include "MSP430InstrInfo.td"
def MSP430InstrInfo : InstrInfo {}
//===----------------------------------------------------------------------===//
// Target Declaration
//===----------------------------------------------------------------------===//
def MSP430 : Target {
let InstructionSet = MSP430InstrInfo;
}

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@ -0,0 +1,99 @@
//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer ------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains a printer that converts from our internal representation
// of machine-dependent LLVM code to the MSP430 assembly language.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "asm-printer"
#include "MSP430.h"
#include "MSP430InstrInfo.h"
#include "MSP430TargetMachine.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
STATISTIC(EmittedInsts, "Number of machine instrs printed");
namespace {
class VISIBILITY_HIDDEN MSP430AsmPrinter : public AsmPrinter {
public:
MSP430AsmPrinter(raw_ostream &O, MSP430TargetMachine &TM,
const TargetAsmInfo *TAI, bool Fast, bool Verbose)
: AsmPrinter(O, TM, TAI, Fast, Verbose) {}
virtual const char *getPassName() const {
return "MSP430 Assembly Printer";
}
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr * MI);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);
bool doFinalization(Module &M);
void getAnalysisUsage(AnalysisUsage &AU) const {
AsmPrinter::getAnalysisUsage(AU);
AU.setPreservesAll();
}
};
} // end of anonymous namespace
#include "MSP430GenAsmWriter.inc"
/// createMSP430CodePrinterPass - Returns a pass that prints the MSP430
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createMSP430CodePrinterPass(raw_ostream &o,
MSP430TargetMachine &tm,
bool fast, bool verbose) {
return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
bool MSP430AsmPrinter::doInitialization(Module &M) {
Mang = new Mangler(M, "", TAI->getPrivateGlobalPrefix());
return false; // success
}
bool MSP430AsmPrinter::doFinalization(Module &M) {
return AsmPrinter::doFinalization(M);
}
bool MSP430AsmPrinter::runOnMachineFunction(MachineFunction &F) {
// We didn't modify anything
return false;
}
void MSP430AsmPrinter::printMachineInstruction(const MachineInstr * MI) {
++EmittedInsts;
// Call the autogenerated instruction printer routines.
if (printInstruction(MI))
return;
assert(0 && "Should not happen");
}

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@ -0,0 +1,84 @@
//===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines an instruction selector for the MSP430 target.
//
//===----------------------------------------------------------------------===//
#include "MSP430.h"
#include "MSP430ISelLowering.h"
#include "MSP430TargetMachine.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/Intrinsics.h"
#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include <queue>
#include <set>
using namespace llvm;
/// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
/// instructions for SelectionDAG operations.
///
namespace {
class MSP430DAGToDAGISel : public SelectionDAGISel {
MSP430TargetLowering &Lowering;
const MSP430Subtarget &Subtarget;
public:
MSP430DAGToDAGISel(MSP430TargetMachine &TM)
: SelectionDAGISel(TM),
Lowering(*TM.getTargetLowering()),
Subtarget(*TM.getSubtargetImpl()) { }
virtual void InstructionSelect();
virtual const char *getPassName() const {
return "MSP430 DAG->DAG Pattern Instruction Selection";
}
// Include the pieces autogenerated from the target description.
#include "MSP430GenDAGISel.inc"
private:
SDNode *Select(SDValue Op);
};
} // end anonymous namespace
/// createMSP430ISelDag - This pass converts a legalized DAG into a
/// MSP430-specific DAG, ready for instruction scheduling.
///
FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM) {
return new MSP430DAGToDAGISel(TM);
}
/// InstructionSelect - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
void MSP430DAGToDAGISel::
InstructionSelect() {
DEBUG(BB->dump());
// Select target instructions for the DAG.
SelectRoot(*CurDAG);
CurDAG->RemoveDeadNodes();
}
SDNode *MSP430DAGToDAGISel::Select(SDValue Op) {
return SelectCode(Op);
}

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@ -0,0 +1,56 @@
//===-- MSP430ISelLowering.cpp - MSP430 DAG Lowering Implementation ------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements the MSP430TargetLowering class.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "msp430-lower"
#include "MSP430ISelLowering.h"
#include "MSP430.h"
#include "MSP430TargetMachine.h"
#include "MSP430Subtarget.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/Intrinsics.h"
#include "llvm/CallingConv.h"
#include "llvm/GlobalVariable.h"
#include "llvm/GlobalAlias.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Debug.h"
#include "llvm/ADT/VectorExtras.h"
using namespace llvm;
MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
TargetLowering(tm), Subtarget(*tm.getSubtargetImpl()), TM(tm) {
// Set up the register classes.
addRegisterClass(MVT::i16, MSP430::MSP430RegsRegisterClass);
// Compute derived properties from the register classes
computeRegisterProperties();
}
SDValue MSP430TargetLowering::
LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
default:
assert(0 && "unimplemented operand");
return SDValue();
}
}
#include "MSP430GenCallingConv.inc"

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@ -0,0 +1,40 @@
//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines the interfaces that MSP430 uses to lower LLVM code into a
// selection DAG.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_MSP430_ISELLOWERING_H
#define LLVM_TARGET_MSP430_ISELLOWERING_H
#include "MSP430.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Target/TargetLowering.h"
namespace llvm {
class MSP430Subtarget;
class MSP430TargetMachine;
class MSP430TargetLowering : public TargetLowering {
public:
explicit MSP430TargetLowering(MSP430TargetMachine &TM);
/// LowerOperation - Provide custom lowering hooks for some operations.
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
private:
const MSP430Subtarget &Subtarget;
const MSP430TargetMachine &TM;
};
} // namespace llvm
#endif // LLVM_TARGET_MSP430_ISELLOWERING_H

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@ -0,0 +1,67 @@
//===- MSP430InstrFormats.td - MSP430 Instruction Formats-----*- tblgen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Describe MSP430 instructions format here
//
// Generic MSP430 Format
class MSP430Inst<dag outs, dag ins, string asmstr> : Instruction {
field bits<16> Inst;
let Namespace = "MSP430";
dag OutOperandList = outs;
dag InOperandList = ins;
let AsmString = asmstr;
}
// FIXME: Create different classes for different addressing modes.
// MSP430 Double Operand (Format I) Instructions
class IForm<bits<4> opcode, bit ad, bit bw, bits<2> as,
dag outs, dag ins, string asmstr, list<dag> pattern>
: MSP430Inst<outs, ins, asmstr> {
let Pattern = pattern;
let Inst{12-15} = opcode;
let Inst{7} = ad;
let Inst{6} = bw;
let Inst{4-5} = as;
}
// MSP430 Single Operand (Format II) Instructions
class IIForm<bits<9> opcode, bit bw, bits<2> ad,
dag outs, dag ins, string asmstr, list<dag> pattern>
: MSP430Inst<outs, ins, asmstr> {
let Pattern = pattern;
let Inst{7-15} = opcode;
let Inst{6} = bw;
let Inst{4-5} = ad;
}
// MSP430 Conditional Jumps Instructions
class CJForm<bits<3> opcode, bits<3> cond, bit s,
dag outs, dag ins, string asmstr, list<dag> pattern>
: MSP430Inst<outs, ins, asmstr> {
let Pattern = pattern;
let Inst{13-15} = opcode;
let Inst{10-12} = cond;
let Inst{9} = s;
}
// Pseudo instructions
class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
: MSP430Inst<outs, ins, asmstr> {
let Pattern = pattern;
let Inst{15-0} = 0;
}

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@ -0,0 +1,28 @@
//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the MSP430 implementation of the TargetInstrInfo class.
//
//===----------------------------------------------------------------------===//
#include "MSP430.h"
#include "MSP430InstrInfo.h"
#include "MSP430TargetMachine.h"
#include "MSP430GenInstrInfo.inc"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
using namespace llvm;
MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
: TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)),
RI(*this), TM(tm) {}

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@ -0,0 +1,39 @@
//===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the MSP430 implementation of the TargetInstrInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_MSP430INSTRINFO_H
#define LLVM_TARGET_MSP430INSTRINFO_H
#include "llvm/Target/TargetInstrInfo.h"
#include "MSP430RegisterInfo.h"
namespace llvm {
class MSP430TargetMachine;
class MSP430InstrInfo : public TargetInstrInfoImpl {
const MSP430RegisterInfo RI;
MSP430TargetMachine &TM;
public:
explicit MSP430InstrInfo(MSP430TargetMachine &TM);
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
/// such, whenever a client has an instance of instruction info, it should
/// always be able to get register info as well (through this method).
///
virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
};
}
#endif

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@ -0,0 +1,34 @@
//===- MSP430InstrInfo.td - MSP430 Instruction defs -----------*- tblgen-*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file describes the MSP430 instructions in TableGen format.
//
//===----------------------------------------------------------------------===//
include "MSP430InstrFormats.td"
//===----------------------------------------------------------------------===//
// Type Constraints.
//===----------------------------------------------------------------------===//
class SDTCisI8<int OpNum> : SDTCisVT<OpNum, i8>;
class SDTCisI16<int OpNum> : SDTCisVT<OpNum, i16>;
//===----------------------------------------------------------------------===//
// Type Profiles.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// MSP430 Specific Node Definitions.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Pseudo Instructions
//===----------------------------------------------------------------------===//
def NOP : Pseudo<(outs), (ins), "nop", []>;

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@ -0,0 +1,73 @@
//===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the MSP430 implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "msp430-reg-info"
#include "MSP430.h"
#include "MSP430RegisterInfo.h"
#include "llvm/ADT/BitVector.h"
using namespace llvm;
// FIXME: Provide proper call frame setup / destroy opcodes.
MSP430RegisterInfo::MSP430RegisterInfo(const TargetInstrInfo &tii)
: MSP430GenRegisterInfo(MSP430::NOP, MSP430::NOP),
TII(tii) {}
const unsigned*
MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
assert(0 && "Not implemented yet!");
}
const TargetRegisterClass* const*
MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
assert(0 && "Not implemented yet!");
}
BitVector
MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
assert(0 && "Not implemented yet!");
}
bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
assert(0 && "Not implemented yet!");
}
void
MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, RegScavenger *RS) const {
assert(0 && "Not implemented yet!");
}
void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const {
assert(0 && "Not implemented yet!");
}
void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
assert(0 && "Not implemented yet!");
}
unsigned MSP430RegisterInfo::getRARegister() const {
assert(0 && "Not implemented yet!");
}
unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const {
assert(0 && "Not implemented yet!");
}
int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
assert(0 && "Not implemented yet!");
}
#include "MSP430GenRegisterInfo.inc"

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@ -0,0 +1,56 @@
//===- MSP430RegisterInfo.h - MSP430 Register Information Impl --*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the MSP430 implementation of the MRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_MSP430REGISTERINFO_H
#define LLVM_TARGET_MSP430REGISTERINFO_H
#include "llvm/Target/TargetRegisterInfo.h"
#include "MSP430GenRegisterInfo.h.inc"
namespace llvm {
class TargetInstrInfo;
struct MSP430RegisterInfo : public MSP430GenRegisterInfo {
private:
const TargetInstrInfo &TII;
public:
MSP430RegisterInfo(const TargetInstrInfo &tii);
/// Code Generation virtual methods...
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
const TargetRegisterClass* const*
getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
BitVector getReservedRegs(const MachineFunction &MF) const;
bool hasFP(const MachineFunction &MF) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, RegScavenger *RS = NULL) const;
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
// Debug information queries.
unsigned getRARegister() const;
unsigned getFrameRegister(MachineFunction &MF) const;
//! Get DWARF debugging register number
int getDwarfRegNum(unsigned RegNum, bool isEH) const;
};
} // end namespace llvm
#endif // LLVM_TARGET_MSP430REGISTERINFO_H

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@ -0,0 +1,57 @@
//===- MSP430RegisterInfo.td - MSP430 Register defs ----------*- tblgen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Declarations that describe the MSP430 register file
//===----------------------------------------------------------------------===//
class MSP430Reg<bits<4> num, string n> : Register<n> {
field bits<4> Num = num;
let Namespace = "MSP430";
}
//===----------------------------------------------------------------------===//
// Registers
//===----------------------------------------------------------------------===//
def PC : MSP430Reg<0, "PC">;
def SP : MSP430Reg<1, "SP">;
def SR : MSP430Reg<2, "SR">;
def CG : MSP430Reg<3, "CG">;
def R4 : MSP430Reg<4, "R4">;
def R5 : MSP430Reg<5, "R5">;
def R6 : MSP430Reg<6, "R6">;
def R7 : MSP430Reg<7, "R7">;
def R8 : MSP430Reg<8, "R8">;
def R9 : MSP430Reg<9, "R9">;
def R10 : MSP430Reg<10, "R10">;
def R11 : MSP430Reg<11, "R11">;
def R12 : MSP430Reg<12, "R12">;
def R13 : MSP430Reg<13, "R13">;
def R14 : MSP430Reg<14, "R14">;
def R15 : MSP430Reg<15, "R15">;
def MSP430Regs : RegisterClass<"MSP430", [i16], 16,
// Volatile registers
[R4, R5, R6, R7, R8, R9, R9, R10, R11, R12, R13, R14, R15,
// Volatile, but not allocable
PC, SP, SR, CG]>
{
let MethodProtos = [{
iterator allocation_order_end(const MachineFunction &MF) const;
}];
let MethodBodies = [{
MSP430RegsClass::iterator
MSP430RegsClass::allocation_order_end(const MachineFunction &MF) const {
// The last 4 registers on the list above are reserved
return end()-4;
}
}];
}

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//===- MSP430Subtarget.cpp - MSP430 Subtarget Information ---------*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements the MSP430 specific subclass of TargetSubtarget.
//
//===----------------------------------------------------------------------===//
#include "MSP430Subtarget.h"
#include "MSP430.h"
#include "MSP430GenSubtarget.inc"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
MSP430Subtarget::MSP430Subtarget(const TargetMachine &TM, const Module &M,
const std::string &FS) {
std::string CPU = "generic";
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
}

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//====-- MSP430Subtarget.h - Define Subtarget for the MSP430 ---*- C++ -*--===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file declares the MSP430 specific subclass of TargetSubtarget.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_MSP430_SUBTARGET_H
#define LLVM_TARGET_MSP430_SUBTARGET_H
#include "llvm/Target/TargetSubtarget.h"
#include <string>
namespace llvm {
class Module;
class TargetMachine;
class MSP430Subtarget : public TargetSubtarget {
bool ExtendedInsts;
public:
/// This constructor initializes the data members to match that
/// of the specified module.
///
MSP430Subtarget(const TargetMachine &TM, const Module &M,
const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
};
} // End llvm namespace
#endif // LLVM_TARGET_MSP430_SUBTARGET_H

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//===-- MSP430TargetAsmInfo.cpp - MSP430 asm properties -------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the declarations of the MSP430TargetAsmInfo properties.
//
//===----------------------------------------------------------------------===//
#include "MSP430TargetAsmInfo.h"
#include "MSP430TargetMachine.h"
using namespace llvm;
MSP430TargetAsmInfo::MSP430TargetAsmInfo(const MSP430TargetMachine &TM)
: TargetAsmInfo(TM) {
}

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//=====-- MSP430TargetAsmInfo.h - MSP430 asm properties -------*- C++ -*--====//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MSP430TargetAsmInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef MSP430TARGETASMINFO_H
#define MSP430TARGETASMINFO_H
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
// Forward declaration.
class MSP430TargetMachine;
struct MSP430TargetAsmInfo : public TargetAsmInfo {
explicit MSP430TargetAsmInfo(const MSP430TargetMachine &TM);
};
} // namespace llvm
#endif

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//===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Top-level implementation for the MSP430 target.
//
//===----------------------------------------------------------------------===//
#include "MSP430.h"
#include "MSP430TargetAsmInfo.h"
#include "MSP430TargetMachine.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
/// MSP430TargetMachineModule - Note that this is used on hosts that
/// cannot link in a library unless there are references into the
/// library. In particular, it seems that it is not possible to get
/// things to work on Win32 without this. Though it is unused, do not
/// remove it.
extern "C" int MSP430TargetMachineModule;
int MSP430TargetMachineModule = 0;
// Register the targets
static RegisterTarget<MSP430TargetMachine>
X("msp430", "MSP430 [experimental]");
MSP430TargetMachine::MSP430TargetMachine(const Module &M,
const std::string &FS) :
Subtarget(*this, M, FS),
DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"),
InstrInfo(*this), TLInfo(*this),
FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0) { }
const TargetAsmInfo *MSP430TargetMachine::createTargetAsmInfo() const {
return new MSP430TargetAsmInfo(*this);
}
bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
PM.add(createMSP430ISelDag(*this));
return false;
}
bool MSP430TargetMachine::
addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose,
raw_ostream &Out) {
// Output assembly language.
PM.add(createMSP430CodePrinterPass(Out, *this, Fast, Verbose));
return false;
}

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//==-- MSP430TargetMachine.h - Define TargetMachine for MSP430 ---*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file declares the MSP430 specific subclass of TargetMachine.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_MSP430_TARGETMACHINE_H
#define LLVM_TARGET_MSP430_TARGETMACHINE_H
#include "MSP430InstrInfo.h"
#include "MSP430ISelLowering.h"
#include "MSP430RegisterInfo.h"
#include "MSP430Subtarget.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
namespace llvm {
/// MSP430TargetMachine
///
class MSP430TargetMachine : public LLVMTargetMachine {
MSP430Subtarget Subtarget;
const TargetData DataLayout; // Calculates type size & alignment
MSP430InstrInfo InstrInfo;
MSP430TargetLowering TLInfo;
// MSP430 does not have any call stack frame, therefore not having
// any MSP430 specific FrameInfo class.
TargetFrameInfo FrameInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
MSP430TargetMachine(const Module &M, const std::string &FS);
virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
virtual const MSP430InstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetData *getTargetData() const { return &DataLayout;}
virtual const MSP430Subtarget *getSubtargetImpl() const { return &Subtarget; }
virtual const TargetRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
virtual MSP430TargetLowering *getTargetLowering() const {
return const_cast<MSP430TargetLowering*>(&TLInfo);
}
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
bool Verbose, raw_ostream &Out);
}; // MSP430TargetMachine.
} // end namespace llvm
#endif // LLVM_TARGET_MSP430_TARGETMACHINE_H

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##===- lib/Target/MSP430/Makefile --------------------------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
LEVEL = ../../..
LIBRARYNAME = LLVMMSP430
TARGET = MSP430
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = MSP430GenRegisterInfo.h.inc MSP430GenRegisterNames.inc \
MSP430GenRegisterInfo.inc MSP430GenInstrNames.inc \
MSP430GenInstrInfo.inc MSP430GenAsmWriter.inc \
MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
MSP430GenSubtarget.inc
include $(LEVEL)/Makefile.common