forked from OSchip/llvm-project
parent
7bee415836
commit
101380015c
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@ -226,6 +226,7 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch],
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mips-*) llvm_cv_target_arch="Mips" ;;
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mips-*) llvm_cv_target_arch="Mips" ;;
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pic16-*) llvm_cv_target_arch="PIC16" ;;
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pic16-*) llvm_cv_target_arch="PIC16" ;;
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xcore-*) llvm_cv_target_arch="XCore" ;;
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xcore-*) llvm_cv_target_arch="XCore" ;;
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msp430-*) llvm_cv_target_arch="MSP430" ;;
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*) llvm_cv_target_arch="Unknown" ;;
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*) llvm_cv_target_arch="Unknown" ;;
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esac])
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esac])
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@ -343,6 +344,7 @@ else
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Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
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Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
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PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
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PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
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XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
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XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
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MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
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*) AC_SUBST(TARGET_HAS_JIT,0) ;;
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*) AC_SUBST(TARGET_HAS_JIT,0) ;;
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esac
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esac
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fi
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fi
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@ -392,7 +394,7 @@ AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
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[Build specific host targets: all,host-only,{target-name} (default=all)]),,
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[Build specific host targets: all,host-only,{target-name} (default=all)]),,
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enableval=all)
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enableval=all)
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case "$enableval" in
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case "$enableval" in
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all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore CBackend MSIL CppBackend" ;;
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all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore MSP430 CBackend MSIL CppBackend" ;;
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host-only)
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host-only)
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case "$llvm_cv_target_arch" in
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case "$llvm_cv_target_arch" in
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x86) TARGETS_TO_BUILD="X86" ;;
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x86) TARGETS_TO_BUILD="X86" ;;
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@ -406,6 +408,7 @@ case "$enableval" in
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CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
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CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
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PIC16) TARGETS_TO_BUILD="PIC16" ;;
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PIC16) TARGETS_TO_BUILD="PIC16" ;;
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XCore) TARGETS_TO_BUILD="XCore" ;;
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XCore) TARGETS_TO_BUILD="XCore" ;;
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MSP430) TARGETS_TO_BUILD="MSP430" ;;
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*) AC_MSG_ERROR([Can not set target to build]) ;;
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*) AC_MSG_ERROR([Can not set target to build]) ;;
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esac
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esac
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;;
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;;
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@ -422,6 +425,7 @@ case "$enableval" in
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spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
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spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
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pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
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pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
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xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
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xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
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msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
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cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
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cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
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msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
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msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
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cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
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cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
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@ -0,0 +1,36 @@
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//==-- MSP430.h - Top-level interface for MSP430 representation --*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in
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// the LLVM MSP430 backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_MSP430_H
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#define LLVM_TARGET_MSP430_H
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namespace llvm {
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class MSP430TargetMachine;
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class FunctionPass;
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class raw_ostream;
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FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM);
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FunctionPass *createMSP430CodePrinterPass(raw_ostream &OS,
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MSP430TargetMachine &TM,
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bool Fast, bool Verbose);
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} // end namespace llvm;
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// Defines symbolic names for MSP430 registers.
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// This defines a mapping from register name to register number.
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#include "MSP430GenRegisterNames.inc"
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// Defines symbolic names for the MSP430 instructions.
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#include "MSP430GenInstrNames.inc"
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#endif
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@ -0,0 +1,54 @@
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//===- MSP430.td - Describe the MSP430 Target Machine ---------*- tblgen -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the MSP430 target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===----------------------------------------------------------------------===//
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// Subtarget Features.
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//===----------------------------------------------------------------------===//
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def FeatureX
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: SubtargetFeature<"ext", "ExtendedInsts", "true",
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"Enable MSP430-X extensions">;
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//===----------------------------------------------------------------------===//
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// MSP430 supported processors.
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"generic", []>;
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "MSP430RegisterInfo.td"
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//===----------------------------------------------------------------------===//
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// Instruction Descriptions
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//===----------------------------------------------------------------------===//
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include "MSP430InstrInfo.td"
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def MSP430InstrInfo : InstrInfo {}
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//===----------------------------------------------------------------------===//
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// Target Declaration
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//===----------------------------------------------------------------------===//
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def MSP430 : Target {
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let InstructionSet = MSP430InstrInfo;
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}
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@ -0,0 +1,99 @@
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//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to the MSP430 assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "MSP430.h"
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#include "MSP430InstrInfo.h"
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#include "MSP430TargetMachine.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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class VISIBILITY_HIDDEN MSP430AsmPrinter : public AsmPrinter {
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public:
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MSP430AsmPrinter(raw_ostream &O, MSP430TargetMachine &TM,
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const TargetAsmInfo *TAI, bool Fast, bool Verbose)
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: AsmPrinter(O, TM, TAI, Fast, Verbose) {}
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virtual const char *getPassName() const {
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return "MSP430 Assembly Printer";
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}
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printMachineInstruction(const MachineInstr * MI);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doFinalization(Module &M);
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AsmPrinter::getAnalysisUsage(AU);
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AU.setPreservesAll();
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}
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};
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} // end of anonymous namespace
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#include "MSP430GenAsmWriter.inc"
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/// createMSP430CodePrinterPass - Returns a pass that prints the MSP430
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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FunctionPass *llvm::createMSP430CodePrinterPass(raw_ostream &o,
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MSP430TargetMachine &tm,
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bool fast, bool verbose) {
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return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
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}
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bool MSP430AsmPrinter::doInitialization(Module &M) {
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Mang = new Mangler(M, "", TAI->getPrivateGlobalPrefix());
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return false; // success
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}
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bool MSP430AsmPrinter::doFinalization(Module &M) {
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return AsmPrinter::doFinalization(M);
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}
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bool MSP430AsmPrinter::runOnMachineFunction(MachineFunction &F) {
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// We didn't modify anything
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return false;
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}
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void MSP430AsmPrinter::printMachineInstruction(const MachineInstr * MI) {
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++EmittedInsts;
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// Call the autogenerated instruction printer routines.
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if (printInstruction(MI))
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return;
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assert(0 && "Should not happen");
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}
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@ -0,0 +1,84 @@
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//===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the MSP430 target.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430.h"
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#include "MSP430ISelLowering.h"
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#include "MSP430TargetMachine.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/CallingConv.h"
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#include "llvm/Constants.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include <queue>
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#include <set>
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using namespace llvm;
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/// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
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/// instructions for SelectionDAG operations.
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///
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namespace {
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class MSP430DAGToDAGISel : public SelectionDAGISel {
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MSP430TargetLowering &Lowering;
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const MSP430Subtarget &Subtarget;
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public:
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MSP430DAGToDAGISel(MSP430TargetMachine &TM)
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: SelectionDAGISel(TM),
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Lowering(*TM.getTargetLowering()),
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Subtarget(*TM.getSubtargetImpl()) { }
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virtual void InstructionSelect();
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virtual const char *getPassName() const {
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return "MSP430 DAG->DAG Pattern Instruction Selection";
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}
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// Include the pieces autogenerated from the target description.
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#include "MSP430GenDAGISel.inc"
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private:
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SDNode *Select(SDValue Op);
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};
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} // end anonymous namespace
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/// createMSP430ISelDag - This pass converts a legalized DAG into a
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/// MSP430-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM) {
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return new MSP430DAGToDAGISel(TM);
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}
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/// InstructionSelect - This callback is invoked by
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/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
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void MSP430DAGToDAGISel::
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InstructionSelect() {
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DEBUG(BB->dump());
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// Select target instructions for the DAG.
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SelectRoot(*CurDAG);
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CurDAG->RemoveDeadNodes();
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}
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SDNode *MSP430DAGToDAGISel::Select(SDValue Op) {
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return SelectCode(Op);
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}
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@ -0,0 +1,56 @@
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//===-- MSP430ISelLowering.cpp - MSP430 DAG Lowering Implementation ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the MSP430TargetLowering class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "msp430-lower"
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#include "MSP430ISelLowering.h"
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#include "MSP430.h"
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#include "MSP430TargetMachine.h"
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#include "MSP430Subtarget.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/CallingConv.h"
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#include "llvm/GlobalVariable.h"
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#include "llvm/GlobalAlias.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/VectorExtras.h"
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using namespace llvm;
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MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
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TargetLowering(tm), Subtarget(*tm.getSubtargetImpl()), TM(tm) {
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||||||
|
|
||||||
|
// Set up the register classes.
|
||||||
|
addRegisterClass(MVT::i16, MSP430::MSP430RegsRegisterClass);
|
||||||
|
|
||||||
|
// Compute derived properties from the register classes
|
||||||
|
computeRegisterProperties();
|
||||||
|
}
|
||||||
|
|
||||||
|
SDValue MSP430TargetLowering::
|
||||||
|
LowerOperation(SDValue Op, SelectionDAG &DAG) {
|
||||||
|
switch (Op.getOpcode()) {
|
||||||
|
default:
|
||||||
|
assert(0 && "unimplemented operand");
|
||||||
|
return SDValue();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#include "MSP430GenCallingConv.inc"
|
|
@ -0,0 +1,40 @@
|
||||||
|
//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file defines the interfaces that MSP430 uses to lower LLVM code into a
|
||||||
|
// selection DAG.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGET_MSP430_ISELLOWERING_H
|
||||||
|
#define LLVM_TARGET_MSP430_ISELLOWERING_H
|
||||||
|
|
||||||
|
#include "MSP430.h"
|
||||||
|
#include "llvm/CodeGen/SelectionDAG.h"
|
||||||
|
#include "llvm/Target/TargetLowering.h"
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
class MSP430Subtarget;
|
||||||
|
class MSP430TargetMachine;
|
||||||
|
|
||||||
|
class MSP430TargetLowering : public TargetLowering {
|
||||||
|
public:
|
||||||
|
explicit MSP430TargetLowering(MSP430TargetMachine &TM);
|
||||||
|
|
||||||
|
/// LowerOperation - Provide custom lowering hooks for some operations.
|
||||||
|
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
|
||||||
|
|
||||||
|
private:
|
||||||
|
const MSP430Subtarget &Subtarget;
|
||||||
|
const MSP430TargetMachine &TM;
|
||||||
|
};
|
||||||
|
} // namespace llvm
|
||||||
|
|
||||||
|
#endif // LLVM_TARGET_MSP430_ISELLOWERING_H
|
|
@ -0,0 +1,67 @@
|
||||||
|
//===- MSP430InstrFormats.td - MSP430 Instruction Formats-----*- tblgen -*-===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// Describe MSP430 instructions format here
|
||||||
|
//
|
||||||
|
|
||||||
|
// Generic MSP430 Format
|
||||||
|
class MSP430Inst<dag outs, dag ins, string asmstr> : Instruction {
|
||||||
|
field bits<16> Inst;
|
||||||
|
|
||||||
|
let Namespace = "MSP430";
|
||||||
|
|
||||||
|
dag OutOperandList = outs;
|
||||||
|
dag InOperandList = ins;
|
||||||
|
|
||||||
|
let AsmString = asmstr;
|
||||||
|
}
|
||||||
|
|
||||||
|
// FIXME: Create different classes for different addressing modes.
|
||||||
|
|
||||||
|
// MSP430 Double Operand (Format I) Instructions
|
||||||
|
class IForm<bits<4> opcode, bit ad, bit bw, bits<2> as,
|
||||||
|
dag outs, dag ins, string asmstr, list<dag> pattern>
|
||||||
|
: MSP430Inst<outs, ins, asmstr> {
|
||||||
|
let Pattern = pattern;
|
||||||
|
|
||||||
|
let Inst{12-15} = opcode;
|
||||||
|
let Inst{7} = ad;
|
||||||
|
let Inst{6} = bw;
|
||||||
|
let Inst{4-5} = as;
|
||||||
|
}
|
||||||
|
|
||||||
|
// MSP430 Single Operand (Format II) Instructions
|
||||||
|
class IIForm<bits<9> opcode, bit bw, bits<2> ad,
|
||||||
|
dag outs, dag ins, string asmstr, list<dag> pattern>
|
||||||
|
: MSP430Inst<outs, ins, asmstr> {
|
||||||
|
let Pattern = pattern;
|
||||||
|
|
||||||
|
let Inst{7-15} = opcode;
|
||||||
|
let Inst{6} = bw;
|
||||||
|
let Inst{4-5} = ad;
|
||||||
|
}
|
||||||
|
|
||||||
|
// MSP430 Conditional Jumps Instructions
|
||||||
|
class CJForm<bits<3> opcode, bits<3> cond, bit s,
|
||||||
|
dag outs, dag ins, string asmstr, list<dag> pattern>
|
||||||
|
: MSP430Inst<outs, ins, asmstr> {
|
||||||
|
let Pattern = pattern;
|
||||||
|
|
||||||
|
let Inst{13-15} = opcode;
|
||||||
|
let Inst{10-12} = cond;
|
||||||
|
let Inst{9} = s;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Pseudo instructions
|
||||||
|
class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
|
||||||
|
: MSP430Inst<outs, ins, asmstr> {
|
||||||
|
let Pattern = pattern;
|
||||||
|
let Inst{15-0} = 0;
|
||||||
|
}
|
|
@ -0,0 +1,28 @@
|
||||||
|
//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file contains the MSP430 implementation of the TargetInstrInfo class.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#include "MSP430.h"
|
||||||
|
#include "MSP430InstrInfo.h"
|
||||||
|
#include "MSP430TargetMachine.h"
|
||||||
|
#include "MSP430GenInstrInfo.inc"
|
||||||
|
#include "llvm/Function.h"
|
||||||
|
#include "llvm/CodeGen/MachineFunction.h"
|
||||||
|
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
||||||
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
||||||
|
|
||||||
|
|
||||||
|
using namespace llvm;
|
||||||
|
|
||||||
|
MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
|
||||||
|
: TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)),
|
||||||
|
RI(*this), TM(tm) {}
|
|
@ -0,0 +1,39 @@
|
||||||
|
//===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file contains the MSP430 implementation of the TargetInstrInfo class.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGET_MSP430INSTRINFO_H
|
||||||
|
#define LLVM_TARGET_MSP430INSTRINFO_H
|
||||||
|
|
||||||
|
#include "llvm/Target/TargetInstrInfo.h"
|
||||||
|
#include "MSP430RegisterInfo.h"
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
class MSP430TargetMachine;
|
||||||
|
|
||||||
|
class MSP430InstrInfo : public TargetInstrInfoImpl {
|
||||||
|
const MSP430RegisterInfo RI;
|
||||||
|
MSP430TargetMachine &TM;
|
||||||
|
public:
|
||||||
|
explicit MSP430InstrInfo(MSP430TargetMachine &TM);
|
||||||
|
|
||||||
|
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
|
||||||
|
/// such, whenever a client has an instance of instruction info, it should
|
||||||
|
/// always be able to get register info as well (through this method).
|
||||||
|
///
|
||||||
|
virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
|
||||||
|
};
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,34 @@
|
||||||
|
//===- MSP430InstrInfo.td - MSP430 Instruction defs -----------*- tblgen-*-===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file describes the MSP430 instructions in TableGen format.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
include "MSP430InstrFormats.td"
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// Type Constraints.
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
class SDTCisI8<int OpNum> : SDTCisVT<OpNum, i8>;
|
||||||
|
class SDTCisI16<int OpNum> : SDTCisVT<OpNum, i16>;
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// Type Profiles.
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// MSP430 Specific Node Definitions.
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// Pseudo Instructions
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
def NOP : Pseudo<(outs), (ins), "nop", []>;
|
|
@ -0,0 +1,73 @@
|
||||||
|
//===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file contains the MSP430 implementation of the TargetRegisterInfo class.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#define DEBUG_TYPE "msp430-reg-info"
|
||||||
|
|
||||||
|
#include "MSP430.h"
|
||||||
|
#include "MSP430RegisterInfo.h"
|
||||||
|
#include "llvm/ADT/BitVector.h"
|
||||||
|
|
||||||
|
using namespace llvm;
|
||||||
|
|
||||||
|
// FIXME: Provide proper call frame setup / destroy opcodes.
|
||||||
|
MSP430RegisterInfo::MSP430RegisterInfo(const TargetInstrInfo &tii)
|
||||||
|
: MSP430GenRegisterInfo(MSP430::NOP, MSP430::NOP),
|
||||||
|
TII(tii) {}
|
||||||
|
|
||||||
|
const unsigned*
|
||||||
|
MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
const TargetRegisterClass* const*
|
||||||
|
MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
BitVector
|
||||||
|
MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
|
||||||
|
int SPAdj, RegScavenger *RS) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
|
||||||
|
MachineBasicBlock &MBB) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned MSP430RegisterInfo::getRARegister() const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
|
||||||
|
assert(0 && "Not implemented yet!");
|
||||||
|
}
|
||||||
|
|
||||||
|
#include "MSP430GenRegisterInfo.inc"
|
|
@ -0,0 +1,56 @@
|
||||||
|
//===- MSP430RegisterInfo.h - MSP430 Register Information Impl --*- C++ -*-===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file contains the MSP430 implementation of the MRegisterInfo class.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGET_MSP430REGISTERINFO_H
|
||||||
|
#define LLVM_TARGET_MSP430REGISTERINFO_H
|
||||||
|
|
||||||
|
#include "llvm/Target/TargetRegisterInfo.h"
|
||||||
|
#include "MSP430GenRegisterInfo.h.inc"
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
class TargetInstrInfo;
|
||||||
|
|
||||||
|
struct MSP430RegisterInfo : public MSP430GenRegisterInfo {
|
||||||
|
private:
|
||||||
|
const TargetInstrInfo &TII;
|
||||||
|
public:
|
||||||
|
MSP430RegisterInfo(const TargetInstrInfo &tii);
|
||||||
|
|
||||||
|
/// Code Generation virtual methods...
|
||||||
|
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
|
||||||
|
|
||||||
|
const TargetRegisterClass* const*
|
||||||
|
getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
|
||||||
|
|
||||||
|
BitVector getReservedRegs(const MachineFunction &MF) const;
|
||||||
|
|
||||||
|
bool hasFP(const MachineFunction &MF) const;
|
||||||
|
|
||||||
|
void eliminateFrameIndex(MachineBasicBlock::iterator II,
|
||||||
|
int SPAdj, RegScavenger *RS = NULL) const;
|
||||||
|
|
||||||
|
void emitPrologue(MachineFunction &MF) const;
|
||||||
|
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
|
||||||
|
|
||||||
|
// Debug information queries.
|
||||||
|
unsigned getRARegister() const;
|
||||||
|
unsigned getFrameRegister(MachineFunction &MF) const;
|
||||||
|
|
||||||
|
//! Get DWARF debugging register number
|
||||||
|
int getDwarfRegNum(unsigned RegNum, bool isEH) const;
|
||||||
|
};
|
||||||
|
|
||||||
|
} // end namespace llvm
|
||||||
|
|
||||||
|
#endif // LLVM_TARGET_MSP430REGISTERINFO_H
|
|
@ -0,0 +1,57 @@
|
||||||
|
//===- MSP430RegisterInfo.td - MSP430 Register defs ----------*- tblgen -*-===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// Declarations that describe the MSP430 register file
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
class MSP430Reg<bits<4> num, string n> : Register<n> {
|
||||||
|
field bits<4> Num = num;
|
||||||
|
let Namespace = "MSP430";
|
||||||
|
}
|
||||||
|
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
// Registers
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
def PC : MSP430Reg<0, "PC">;
|
||||||
|
def SP : MSP430Reg<1, "SP">;
|
||||||
|
def SR : MSP430Reg<2, "SR">;
|
||||||
|
def CG : MSP430Reg<3, "CG">;
|
||||||
|
def R4 : MSP430Reg<4, "R4">;
|
||||||
|
def R5 : MSP430Reg<5, "R5">;
|
||||||
|
def R6 : MSP430Reg<6, "R6">;
|
||||||
|
def R7 : MSP430Reg<7, "R7">;
|
||||||
|
def R8 : MSP430Reg<8, "R8">;
|
||||||
|
def R9 : MSP430Reg<9, "R9">;
|
||||||
|
def R10 : MSP430Reg<10, "R10">;
|
||||||
|
def R11 : MSP430Reg<11, "R11">;
|
||||||
|
def R12 : MSP430Reg<12, "R12">;
|
||||||
|
def R13 : MSP430Reg<13, "R13">;
|
||||||
|
def R14 : MSP430Reg<14, "R14">;
|
||||||
|
def R15 : MSP430Reg<15, "R15">;
|
||||||
|
|
||||||
|
def MSP430Regs : RegisterClass<"MSP430", [i16], 16,
|
||||||
|
// Volatile registers
|
||||||
|
[R4, R5, R6, R7, R8, R9, R9, R10, R11, R12, R13, R14, R15,
|
||||||
|
// Volatile, but not allocable
|
||||||
|
PC, SP, SR, CG]>
|
||||||
|
{
|
||||||
|
let MethodProtos = [{
|
||||||
|
iterator allocation_order_end(const MachineFunction &MF) const;
|
||||||
|
}];
|
||||||
|
let MethodBodies = [{
|
||||||
|
MSP430RegsClass::iterator
|
||||||
|
MSP430RegsClass::allocation_order_end(const MachineFunction &MF) const {
|
||||||
|
// The last 4 registers on the list above are reserved
|
||||||
|
return end()-4;
|
||||||
|
}
|
||||||
|
}];
|
||||||
|
}
|
||||||
|
|
|
@ -0,0 +1,27 @@
|
||||||
|
//===- MSP430Subtarget.cpp - MSP430 Subtarget Information ---------*- C++ -*-=//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file implements the MSP430 specific subclass of TargetSubtarget.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#include "MSP430Subtarget.h"
|
||||||
|
#include "MSP430.h"
|
||||||
|
#include "MSP430GenSubtarget.inc"
|
||||||
|
#include "llvm/Target/TargetMachine.h"
|
||||||
|
|
||||||
|
using namespace llvm;
|
||||||
|
|
||||||
|
MSP430Subtarget::MSP430Subtarget(const TargetMachine &TM, const Module &M,
|
||||||
|
const std::string &FS) {
|
||||||
|
std::string CPU = "generic";
|
||||||
|
|
||||||
|
// Parse features string.
|
||||||
|
ParseSubtargetFeatures(FS, CPU);
|
||||||
|
}
|
|
@ -0,0 +1,40 @@
|
||||||
|
//====-- MSP430Subtarget.h - Define Subtarget for the MSP430 ---*- C++ -*--===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file declares the MSP430 specific subclass of TargetSubtarget.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGET_MSP430_SUBTARGET_H
|
||||||
|
#define LLVM_TARGET_MSP430_SUBTARGET_H
|
||||||
|
|
||||||
|
#include "llvm/Target/TargetSubtarget.h"
|
||||||
|
|
||||||
|
#include <string>
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
class Module;
|
||||||
|
class TargetMachine;
|
||||||
|
|
||||||
|
class MSP430Subtarget : public TargetSubtarget {
|
||||||
|
bool ExtendedInsts;
|
||||||
|
public:
|
||||||
|
/// This constructor initializes the data members to match that
|
||||||
|
/// of the specified module.
|
||||||
|
///
|
||||||
|
MSP430Subtarget(const TargetMachine &TM, const Module &M,
|
||||||
|
const std::string &FS);
|
||||||
|
|
||||||
|
/// ParseSubtargetFeatures - Parses features string setting specified
|
||||||
|
/// subtarget options. Definition of function is auto generated by tblgen.
|
||||||
|
void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
|
||||||
|
};
|
||||||
|
} // End llvm namespace
|
||||||
|
|
||||||
|
#endif // LLVM_TARGET_MSP430_SUBTARGET_H
|
|
@ -0,0 +1,21 @@
|
||||||
|
//===-- MSP430TargetAsmInfo.cpp - MSP430 asm properties -------------------===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file contains the declarations of the MSP430TargetAsmInfo properties.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#include "MSP430TargetAsmInfo.h"
|
||||||
|
#include "MSP430TargetMachine.h"
|
||||||
|
|
||||||
|
using namespace llvm;
|
||||||
|
|
||||||
|
MSP430TargetAsmInfo::MSP430TargetAsmInfo(const MSP430TargetMachine &TM)
|
||||||
|
: TargetAsmInfo(TM) {
|
||||||
|
}
|
|
@ -0,0 +1,30 @@
|
||||||
|
//=====-- MSP430TargetAsmInfo.h - MSP430 asm properties -------*- C++ -*--====//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file contains the declaration of the MSP430TargetAsmInfo class.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#ifndef MSP430TARGETASMINFO_H
|
||||||
|
#define MSP430TARGETASMINFO_H
|
||||||
|
|
||||||
|
#include "llvm/Target/TargetAsmInfo.h"
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
// Forward declaration.
|
||||||
|
class MSP430TargetMachine;
|
||||||
|
|
||||||
|
struct MSP430TargetAsmInfo : public TargetAsmInfo {
|
||||||
|
explicit MSP430TargetAsmInfo(const MSP430TargetMachine &TM);
|
||||||
|
};
|
||||||
|
|
||||||
|
} // namespace llvm
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,62 @@
|
||||||
|
//===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// Top-level implementation for the MSP430 target.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
#include "MSP430.h"
|
||||||
|
#include "MSP430TargetAsmInfo.h"
|
||||||
|
#include "MSP430TargetMachine.h"
|
||||||
|
#include "llvm/Module.h"
|
||||||
|
#include "llvm/PassManager.h"
|
||||||
|
#include "llvm/CodeGen/Passes.h"
|
||||||
|
#include "llvm/Target/TargetAsmInfo.h"
|
||||||
|
#include "llvm/Target/TargetMachineRegistry.h"
|
||||||
|
|
||||||
|
using namespace llvm;
|
||||||
|
|
||||||
|
/// MSP430TargetMachineModule - Note that this is used on hosts that
|
||||||
|
/// cannot link in a library unless there are references into the
|
||||||
|
/// library. In particular, it seems that it is not possible to get
|
||||||
|
/// things to work on Win32 without this. Though it is unused, do not
|
||||||
|
/// remove it.
|
||||||
|
extern "C" int MSP430TargetMachineModule;
|
||||||
|
int MSP430TargetMachineModule = 0;
|
||||||
|
|
||||||
|
|
||||||
|
// Register the targets
|
||||||
|
static RegisterTarget<MSP430TargetMachine>
|
||||||
|
X("msp430", "MSP430 [experimental]");
|
||||||
|
|
||||||
|
MSP430TargetMachine::MSP430TargetMachine(const Module &M,
|
||||||
|
const std::string &FS) :
|
||||||
|
Subtarget(*this, M, FS),
|
||||||
|
DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"),
|
||||||
|
InstrInfo(*this), TLInfo(*this),
|
||||||
|
FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0) { }
|
||||||
|
|
||||||
|
|
||||||
|
const TargetAsmInfo *MSP430TargetMachine::createTargetAsmInfo() const {
|
||||||
|
return new MSP430TargetAsmInfo(*this);
|
||||||
|
}
|
||||||
|
|
||||||
|
bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
|
||||||
|
// Install an instruction selector.
|
||||||
|
PM.add(createMSP430ISelDag(*this));
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
bool MSP430TargetMachine::
|
||||||
|
addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose,
|
||||||
|
raw_ostream &Out) {
|
||||||
|
// Output assembly language.
|
||||||
|
PM.add(createMSP430CodePrinterPass(Out, *this, Fast, Verbose));
|
||||||
|
return false;
|
||||||
|
}
|
|
@ -0,0 +1,66 @@
|
||||||
|
//==-- MSP430TargetMachine.h - Define TargetMachine for MSP430 ---*- C++ -*-==//
|
||||||
|
//
|
||||||
|
// The LLVM Compiler Infrastructure
|
||||||
|
//
|
||||||
|
// This file is distributed under the University of Illinois Open Source
|
||||||
|
// License. See LICENSE.TXT for details.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
//
|
||||||
|
// This file declares the MSP430 specific subclass of TargetMachine.
|
||||||
|
//
|
||||||
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef LLVM_TARGET_MSP430_TARGETMACHINE_H
|
||||||
|
#define LLVM_TARGET_MSP430_TARGETMACHINE_H
|
||||||
|
|
||||||
|
#include "MSP430InstrInfo.h"
|
||||||
|
#include "MSP430ISelLowering.h"
|
||||||
|
#include "MSP430RegisterInfo.h"
|
||||||
|
#include "MSP430Subtarget.h"
|
||||||
|
#include "llvm/Target/TargetData.h"
|
||||||
|
#include "llvm/Target/TargetFrameInfo.h"
|
||||||
|
#include "llvm/Target/TargetMachine.h"
|
||||||
|
|
||||||
|
namespace llvm {
|
||||||
|
|
||||||
|
/// MSP430TargetMachine
|
||||||
|
///
|
||||||
|
class MSP430TargetMachine : public LLVMTargetMachine {
|
||||||
|
MSP430Subtarget Subtarget;
|
||||||
|
const TargetData DataLayout; // Calculates type size & alignment
|
||||||
|
MSP430InstrInfo InstrInfo;
|
||||||
|
MSP430TargetLowering TLInfo;
|
||||||
|
|
||||||
|
// MSP430 does not have any call stack frame, therefore not having
|
||||||
|
// any MSP430 specific FrameInfo class.
|
||||||
|
TargetFrameInfo FrameInfo;
|
||||||
|
|
||||||
|
protected:
|
||||||
|
virtual const TargetAsmInfo *createTargetAsmInfo() const;
|
||||||
|
|
||||||
|
public:
|
||||||
|
MSP430TargetMachine(const Module &M, const std::string &FS);
|
||||||
|
|
||||||
|
virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
|
||||||
|
virtual const MSP430InstrInfo *getInstrInfo() const { return &InstrInfo; }
|
||||||
|
virtual const TargetData *getTargetData() const { return &DataLayout;}
|
||||||
|
virtual const MSP430Subtarget *getSubtargetImpl() const { return &Subtarget; }
|
||||||
|
|
||||||
|
virtual const TargetRegisterInfo *getRegisterInfo() const {
|
||||||
|
return &InstrInfo.getRegisterInfo();
|
||||||
|
}
|
||||||
|
|
||||||
|
virtual MSP430TargetLowering *getTargetLowering() const {
|
||||||
|
return const_cast<MSP430TargetLowering*>(&TLInfo);
|
||||||
|
}
|
||||||
|
|
||||||
|
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||||
|
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||||
|
bool Verbose, raw_ostream &Out);
|
||||||
|
}; // MSP430TargetMachine.
|
||||||
|
|
||||||
|
} // end namespace llvm
|
||||||
|
|
||||||
|
#endif // LLVM_TARGET_MSP430_TARGETMACHINE_H
|
|
@ -0,0 +1,21 @@
|
||||||
|
##===- lib/Target/MSP430/Makefile --------------------------*- Makefile -*-===##
|
||||||
|
#
|
||||||
|
# The LLVM Compiler Infrastructure
|
||||||
|
#
|
||||||
|
# This file is distributed under the University of Illinois Open Source
|
||||||
|
# License. See LICENSE.TXT for details.
|
||||||
|
#
|
||||||
|
##===----------------------------------------------------------------------===##
|
||||||
|
LEVEL = ../../..
|
||||||
|
LIBRARYNAME = LLVMMSP430
|
||||||
|
TARGET = MSP430
|
||||||
|
|
||||||
|
# Make sure that tblgen is run, first thing.
|
||||||
|
BUILT_SOURCES = MSP430GenRegisterInfo.h.inc MSP430GenRegisterNames.inc \
|
||||||
|
MSP430GenRegisterInfo.inc MSP430GenInstrNames.inc \
|
||||||
|
MSP430GenInstrInfo.inc MSP430GenAsmWriter.inc \
|
||||||
|
MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
|
||||||
|
MSP430GenSubtarget.inc
|
||||||
|
|
||||||
|
include $(LEVEL)/Makefile.common
|
||||||
|
|
Loading…
Reference in New Issue