forked from OSchip/llvm-project
[NFC][AMDGPU] Remove some generic pointers in memory-legalizer tests
These tests implicitly depend on the target supporting generic pointers, so to prepare for testing them on GFX6 (which lacks FLAT) remove the dependency where possible. Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D91666
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@ -454,10 +454,10 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_private_0(
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i32 addrspace(5)* %in, i32* %out) {
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i32 addrspace(5)* %in, i32 addrspace(1)* %out) {
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entry:
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%val = load i32, i32 addrspace(5)* %in, align 4, !nontemporal !0
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store i32 %val, i32* %out
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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@ -469,12 +469,12 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_private_1(
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i32 addrspace(5)* %in, i32* %out) {
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i32 addrspace(5)* %in, i32 addrspace(1)* %out) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val.gep = getelementptr inbounds i32, i32 addrspace(5)* %in, i32 %tid
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%val = load i32, i32 addrspace(5)* %val.gep, align 4, !nontemporal !0
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store i32 %val, i32* %out
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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@ -485,10 +485,10 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_global_0(
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i32 addrspace(1)* %in, i32* %out) {
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i32 addrspace(1)* %in, i32 addrspace(1)* %out) {
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entry:
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%val = load i32, i32 addrspace(1)* %in, align 4, !nontemporal !0
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store i32 %val, i32* %out
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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@ -501,12 +501,12 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_global_1(
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i32 addrspace(1)* %in, i32* %out) {
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i32 addrspace(1)* %in, i32 addrspace(1)* %out) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val.gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i32 %tid
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%val = load i32, i32 addrspace(1)* %val.gep, align 4, !nontemporal !0
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store i32 %val, i32* %out
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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@ -517,10 +517,10 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_local_0(
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i32 addrspace(3)* %in, i32* %out) {
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i32 addrspace(3)* %in, i32 addrspace(1)* %out) {
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entry:
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%val = load i32, i32 addrspace(3)* %in, align 4, !nontemporal !0
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store i32 %val, i32* %out
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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@ -531,12 +531,12 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_local_1(
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i32 addrspace(3)* %in, i32* %out) {
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i32 addrspace(3)* %in, i32 addrspace(1)* %out) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val.gep = getelementptr inbounds i32, i32 addrspace(3)* %in, i32 %tid
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%val = load i32, i32 addrspace(3)* %val.gep, align 4, !nontemporal !0
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store i32 %val, i32* %out
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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@ -321,9 +321,9 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_private_0(
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i32* %in, i32 addrspace(5)* %out) {
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i32 addrspace(1)* %in, i32 addrspace(5)* %out) {
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entry:
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%val = load i32, i32* %in, align 4
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%val = load i32, i32 addrspace(1)* %in, align 4
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store i32 %val, i32 addrspace(5)* %out, !nontemporal !0
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ret void
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}
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@ -336,10 +336,10 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_private_1(
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i32* %in, i32 addrspace(5)* %out) {
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i32 addrspace(1)* %in, i32 addrspace(5)* %out) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val = load i32, i32* %in, align 4
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%val = load i32, i32 addrspace(1)* %in, align 4
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%out.gep = getelementptr inbounds i32, i32 addrspace(5)* %out, i32 %tid
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store i32 %val, i32 addrspace(5)* %out.gep, !nontemporal !0
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ret void
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@ -354,9 +354,9 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_global_0(
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i32* %in, i32 addrspace(1)* %out) {
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i32 addrspace(1)* %in, i32 addrspace(1)* %out) {
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entry:
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%val = load i32, i32* %in, align 4
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%val = load i32, i32 addrspace(1)* %in, align 4
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store i32 %val, i32 addrspace(1)* %out, !nontemporal !0
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ret void
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}
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@ -370,10 +370,10 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_global_1(
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i32* %in, i32 addrspace(1)* %out) {
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i32 addrspace(1)* %in, i32 addrspace(1)* %out) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val = load i32, i32* %in, align 4
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%val = load i32, i32 addrspace(1)* %in, align 4
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%out.gep = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
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store i32 %val, i32 addrspace(1)* %out.gep, !nontemporal !0
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ret void
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@ -386,9 +386,9 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_local_0(
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i32* %in, i32 addrspace(3)* %out) {
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i32 addrspace(1)* %in, i32 addrspace(3)* %out) {
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entry:
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%val = load i32, i32* %in, align 4
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%val = load i32, i32 addrspace(1)* %in, align 4
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store i32 %val, i32 addrspace(3)* %out, !nontemporal !0
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ret void
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}
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@ -400,10 +400,10 @@ entry:
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; GFX10CU: .amdhsa_workgroup_processor_mode 0
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; GFX10-NOT: .amdhsa_memory_ordered 0
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define amdgpu_kernel void @nontemporal_local_1(
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i32* %in, i32 addrspace(3)* %out) {
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i32 addrspace(1)* %in, i32 addrspace(3)* %out) {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%val = load i32, i32* %in, align 4
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%val = load i32, i32 addrspace(1)* %in, align 4
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%out.gep = getelementptr inbounds i32, i32 addrspace(3)* %out, i32 %tid
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store i32 %val, i32 addrspace(3)* %out.gep, !nontemporal !0
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ret void
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