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AMDHSA: Rename RESERVED -> RESERVED0, mark gfx9-specific field 

llvm-svn: 335706
This commit is contained in:
Konstantin Zhuravlyov 2018-06-27 05:18:50 +00:00
parent 364ff7f9d9
commit 0fa60ca9f1
1 changed files with 4 additions and 4 deletions
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8
llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
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@ -89,8 +89,8 @@ enum : int32_t {
COMPUTE_PGM_RSRC1(ENABLE_IEEE_MODE, 23, 1), COMPUTE_PGM_RSRC1(ENABLE_IEEE_MODE, 23, 1),
COMPUTE_PGM_RSRC1(BULKY, 24, 1), COMPUTE_PGM_RSRC1(BULKY, 24, 1),
COMPUTE_PGM_RSRC1(CDBG_USER, 25, 1), COMPUTE_PGM_RSRC1(CDBG_USER, 25, 1),
COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1), COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1), // GFX9+
COMPUTE_PGM_RSRC1(RESERVED, 27, 5), COMPUTE_PGM_RSRC1(RESERVED0, 27, 5),
}; };
#undef COMPUTE_PGM_RSRC1 #undef COMPUTE_PGM_RSRC1
@ -116,7 +116,7 @@ enum : int32_t {
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW, 28, 1), COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW, 28, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_INEXACT, 29, 1), COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_INEXACT, 29, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO, 30, 1), COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO, 30, 1),
COMPUTE_PGM_RSRC2(RESERVED, 31, 1), COMPUTE_PGM_RSRC2(RESERVED0, 31, 1),
}; };
#undef COMPUTE_PGM_RSRC2 #undef COMPUTE_PGM_RSRC2
@ -131,7 +131,7 @@ enum : int32_t {
KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_ID, 4, 1), KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_ID, 4, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_FLAT_SCRATCH_INIT, 5, 1), KERNEL_CODE_PROPERTY(ENABLE_SGPR_FLAT_SCRATCH_INIT, 5, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_SIZE, 6, 1), KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_SIZE, 6, 1),
KERNEL_CODE_PROPERTY(RESERVED, 7, 9), KERNEL_CODE_PROPERTY(RESERVED0, 7, 9),
}; };
#undef KERNEL_CODE_PROPERTY #undef KERNEL_CODE_PROPERTY