maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

LLVM dialect: prefix operations that correspond to intrinsics with "intr." 

LLVM intrinsics have an open name space and their names can potentially overlap
with names of LLVM instructions (LLVM intrinsics are functions, not
instructions).  In MLIR, LLVM intrinsics are modeled as operations, so it needs
to make sure their names cannot clash with the instructions.  Use the "intr."
prefix for intrinsics in the LLVM dialect.

PiperOrigin-RevId: 264372173
This commit is contained in:
Alex Zinenko 2019-08-20 06:38:28 -07:00 committed by A. Unique TensorFlower
parent f55ac5c076
commit 0f974817b5
4 changed files with 9 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
View File

@ -535,9 +535,10 @@ def LLVM_ConstantOp
// Operations that correspond to LLVM intrinsics. With MLIR operation set being
// extendable, there is no reason to introduce a hard boundary between "core"
// operations and intrinsics.
// operations and intrinsics. However, we systematically prefix them with
// "intr." to avoid potential name clashes.
def LLVM_fmuladd : LLVM_Op<"fmuladd", [NoSideEffect]>,
def LLVM_fmuladd : LLVM_Op<"intr.fmuladd", [NoSideEffect]>,
Arguments<(ins LLVM_Type:$a, LLVM_Type:$b, LLVM_Type:$c)>,
Results<(outs LLVM_Type:$res)> {
let llvmBuilder = [{

4
mlir/include/mlir/Dialect/VectorOps/VectorOps.td
View File

@ -80,8 +80,8 @@ def OuterProductOp :
An optional extra 2-D vector argument may be specified in which case the
operation returns the sum of the outer product and the extra vector. When
lowered to the LLVMIR dialect, this form emits `llvm.fmuladd`, which can
lower to actual `fma` instructions in LLVM.
lowered to the LLVMIR dialect, this form emits `llvm.intr.fmuladd`, which
can lower to actual `fma` instructions in LLVM.
Examples

4
mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
View File

@ -22,11 +22,11 @@ func @outerproduct_add(%arg0: vector<2xf32>, %arg1: vector<3xf32>, %arg2: vector
// CHECK: llvm.undef : !llvm<"[2 x <3 x float>]">
// CHECK: llvm.shufflevector {{.*}} [0 : i32, 0 : i32, 0 : i32] : !llvm<"<2 x float>">, !llvm<"<2 x float>">
// CHECK: llvm.extractvalue {{.*}}[0] : !llvm<"[2 x <3 x float>]">
// CHECK: "llvm.fmuladd"({{.*}}) : (!llvm<"<3 x float>">, !llvm<"<3 x float>">, !llvm<"<3 x float>">) -> !llvm<"<3 x float>">
// CHECK: "llvm.intr.fmuladd"({{.*}}) : (!llvm<"<3 x float>">, !llvm<"<3 x float>">, !llvm<"<3 x float>">) -> !llvm<"<3 x float>">
// CHECK: llvm.insertvalue {{.*}}[0] : !llvm<"[2 x <3 x float>]">
// CHECK: llvm.shufflevector {{.*}} [1 : i32, 1 : i32, 1 : i32] : !llvm<"<2 x float>">, !llvm<"<2 x float>">
// CHECK: llvm.extractvalue {{.*}}[1] : !llvm<"[2 x <3 x float>]">
// CHECK: "llvm.fmuladd"({{.*}}) : (!llvm<"<3 x float>">, !llvm<"<3 x float>">, !llvm<"<3 x float>">) -> !llvm<"<3 x float>">
// CHECK: "llvm.intr.fmuladd"({{.*}}) : (!llvm<"<3 x float>">, !llvm<"<3 x float>">, !llvm<"<3 x float>">) -> !llvm<"<3 x float>">
// CHECK: llvm.insertvalue {{.*}}[1] : !llvm<"[2 x <3 x float>]">
// CHECK: llvm.return {{.*}} : !llvm<"[2 x <3 x float>]">

4
mlir/test/Target/llvmir-intrinsics.mlir
View File

@ -3,9 +3,9 @@
// CHECK-LABEL: @intrinsics
func @intrinsics(%arg0: !llvm.float, %arg1: !llvm.float, %arg2: !llvm<"<8 x float>">) {
// CHECK: call float @llvm.fmuladd.f32.f32.f32
"llvm.fmuladd"(%arg0, %arg1, %arg0) : (!llvm.float, !llvm.float, !llvm.float) -> !llvm.float
"llvm.intr.fmuladd"(%arg0, %arg1, %arg0) : (!llvm.float, !llvm.float, !llvm.float) -> !llvm.float
// CHECK: call <8 x float> @llvm.fmuladd.v8f32.v8f32.v8f32
"llvm.fmuladd"(%arg2, %arg2, %arg2) : (!llvm<"<8 x float>">, !llvm<"<8 x float>">, !llvm<"<8 x float>">) -> !llvm<"<8 x float>">
"llvm.intr.fmuladd"(%arg2, %arg2, %arg2) : (!llvm<"<8 x float>">, !llvm<"<8 x float>">, !llvm<"<8 x float>">) -> !llvm<"<8 x float>">
llvm.return
}