forked from OSchip/llvm-project
AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def
llvm-svn: 353522
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@ -139,7 +139,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
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ConstantPtr, LocalPtr, FlatPtr, PrivatePtr})
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.legalFor({LLT::vector(3, 16)})// FIXME: Hack
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.clampScalarOrElt(0, S32, S512)
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.legalIf(isMultiple32(0));
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.legalIf(isMultiple32(0))
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.widenScalarToNextPow2(0, 32);
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// FIXME: i1 operands to intrinsics should always be legal, but other i1
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@ -69,6 +69,20 @@ body: |
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$vgpr0 = COPY %0
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...
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---
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name: test_implicit_def_48
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_48
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY [[DEF]](s64)
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; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](s64)
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%0:_(s48) = G_IMPLICIT_DEF
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%1:_(s64) = G_ANYEXT %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_implicit_def_s64
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body: |
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@ -81,6 +95,20 @@ body: |
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$vgpr0_vgpr1 = COPY %0
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...
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---
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name: test_implicit_def_s65
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body: |
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bb.0:
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; CHECK-LABEL: name: test_implicit_def_s65
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; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
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; CHECK: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[DEF]](s128)
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; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96)
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%0:_(s65) = G_IMPLICIT_DEF
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%1:_(s96) = G_ANYEXT %0
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$vgpr0_vgpr1_vgpr2 = COPY %1
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...
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---
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name: test_implicit_def_s128
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body: |
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