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[PowerPC] PPCVSXFMAMutate should ignore trivial-copy addends 

We might end up with a trivial copy as the addend, and if so, we should ignore
the corresponding FMA instruction. The trivial copy can be coalesced away later,
so there's nothing to do here. We should not, however, assert. Fixes PR24544.

llvm-svn: 245907
This commit is contained in:
Hal Finkel 2015-08-24 23:48:28 +00:00
parent 40882bb9f8
commit 0f2ddcb83f
2 changed files with 46 additions and 5 deletions
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13
llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
View File

@ -186,11 +186,14 @@ protected:
if (!KilledProdOp)
continue;
// For virtual registers, verify that the addend source register
// is live here (as should have been assured above).
assert((!TargetRegisterInfo::isVirtualRegister(AddendSrcReg) ||
LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) &&
"Addend source register is not live!");
// If the addend copy is used only by this MI, then the addend source
// register is likely not live here. This could be fixed (based on the
// legality checks above, the live range for the addend source register
// could be extended), but it seems likely that such a trivial copy can
// be coalesced away later, and thus is not worth the effort.
if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg) &&
!LIS->getInterval(AddendSrcReg).liveAt(FMAIdx))
continue;
// Transform: (O2 * O3) + O1 -> (O2 * O1) + O3.

38
llvm/test/CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll Normal file
View File

@ -0,0 +1,38 @@
; RUN: llc < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind
define void @LSH_recall_init(float %d_min, float %W) #0 {
entry:
br i1 undef, label %for.body.lr.ph, label %for.end
; CHECK-LABEL: @LSH_recall_init
; CHECK: xsnmsubadp
for.body.lr.ph: ; preds = %entry
%conv3 = fpext float %W to double
br label %for.body
for.body: ; preds = %for.body, %for.body.lr.ph
%div = fdiv fast float 0.000000e+00, 0.000000e+00
%add = fadd fast float %div, %d_min
%conv2 = fpext float %add to double
%0 = tail call double @llvm.sqrt.f64(double %conv2)
%div4 = fdiv fast double %conv3, %0
%call = tail call signext i32 bitcast (i32 (...)* @p_col_helper to i32 (double)*)(double %div4) #2
br label %for.body
for.end: ; preds = %entry
ret void
}
; Function Attrs: nounwind readnone
declare double @llvm.sqrt.f64(double) #1
declare signext i32 @p_col_helper(...) #2
attributes #0 = { nounwind "no-infs-fp-math"="true" "no-nans-fp-math"="true" "target-cpu"="pwr7" "unsafe-fp-math"="true" }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind }