forked from OSchip/llvm-project
[mlir] Fix test by adapting to C util functions moving to libmlir_c_runner_utils
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@ -1,4 +1,4 @@
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// RUN: mlir-opt -convert-linalg-to-loops -lower-affine -convert-scf-to-std -convert-std-to-llvm %s | mlir-cpu-runner -O3 -e main -entry-point-result=void -shared-libs=%mlir_runner_utils_dir/libmlir_runner_utils%shlibext | FileCheck %s
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// RUN: mlir-opt -convert-linalg-to-loops -lower-affine -convert-scf-to-std -convert-vector-to-llvm -convert-std-to-llvm %s | mlir-cpu-runner -O3 -e main -entry-point-result=void -shared-libs=%mlir_runner_utils_dir/libmlir_c_runner_utils%shlibext | FileCheck %s
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func @main() {
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%A = alloc() : memref<16x16xf32>
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@ -20,8 +20,8 @@ func @main() {
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%t_end = call @rtclock() : () -> f64
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%t = subf %t_end, %t_start : f64
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%pC = memref_cast %C : memref<16x16xf32> to memref<*xf32>
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call @print_memref_f32(%pC) : (memref<*xf32>) -> ()
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%res = affine.load %C[0, 0]: memref<16x16xf32>
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vector.print %res: f32
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%c0 = constant 0 : index
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%c1 = constant 1 : index
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@ -44,7 +44,7 @@ func @main() {
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return
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}
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// CHECK: 17, 17, 17,
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// CHECK: 17
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func @sgemm_naive(%arg0: memref<16x16xf32>, %arg1: memref<16x16xf32>, %arg2: memref<16x16xf32>) {
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%c0 = constant 0 : index
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@ -71,4 +71,3 @@ func @sgemm_naive(%arg0: memref<16x16xf32>, %arg1: memref<16x16xf32>, %arg2: mem
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func private @print_flops(f64)
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func private @rtclock() -> f64
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func private @print_memref_f32(memref<*xf32>)
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