forked from OSchip/llvm-project
parent
576def7fbe
commit
0f260e1785
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@ -704,24 +704,31 @@ void MachineInstr::addMemOperand(MachineFunction &MF,
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bool MachineInstr::isIdenticalTo(const MachineInstr *Other,
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bool MachineInstr::isIdenticalTo(const MachineInstr *Other,
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MICheckType Check) const {
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MICheckType Check) const {
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if (Other->getOpcode() != getOpcode() ||
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// If opcodes or number of operands are not the same then the two
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Other->getNumOperands() != getNumOperands())
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// instructions are obviously not identical.
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if (Other->getOpcode() != getOpcode() ||
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Other->getNumOperands() != getNumOperands())
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return false;
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// Check operands to make sure they match.
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = getOperand(i);
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const MachineOperand &OMO = Other->getOperand(i);
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// Clients may or may not want to ignore defs when testing for equality.
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// For example, machine CSE pass only cares about finding common
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// subexpressions, so it's safe to ignore virtual register defs.
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if (Check != CheckDefs && MO.isReg() && MO.isDef()) {
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if (Check == IgnoreDefs)
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continue;
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// Check == IgnoreVRegDefs
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if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) ||
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TargetRegisterInfo::isPhysicalRegister(OMO.getReg()))
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if (MO.getReg() != OMO.getReg())
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return false;
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} else if (!MO.isIdenticalTo(OMO))
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return false;
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return false;
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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}
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const MachineOperand &MO = getOperand(i);
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return true;
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const MachineOperand &OMO = Other->getOperand(i);
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if (Check != CheckDefs && MO.isReg() && MO.isDef()) {
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if (Check == IgnoreDefs)
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continue;
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// Check == IgnoreVRegDefs
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if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) ||
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TargetRegisterInfo::isPhysicalRegister(OMO.getReg()))
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if (MO.getReg() != OMO.getReg())
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return false;
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} else if (!MO.isIdenticalTo(OMO))
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return false;
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}
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return true;
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}
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}
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/// removeFromParent - This method unlinks 'this' from the containing basic
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/// removeFromParent - This method unlinks 'this' from the containing basic
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