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I forgot that we always spill fp values as 64-bits. Implement spill folding 

for FP as well.  This triggers a couple dozen times on 177.mesa (for example).

llvm-svn: 23299
This commit is contained in:
Chris Lattner 2005-09-09 21:59:44 +00:00
parent 712e78ee28
commit 0f2146bb5d
1 changed files with 10 additions and 3 deletions
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13
llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp
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@ -149,14 +149,21 @@ MachineInstr *PPC32RegisterInfo::foldMemoryOperand(MachineInstr *MI,
unsigned InReg = MI->getOperand(1).getReg();
return addFrameReference(BuildMI(PPC::STW,
3).addReg(InReg), FrameIndex);
} else {
} else { // move -> load
unsigned OutReg = MI->getOperand(0).getReg();
return addFrameReference(BuildMI(PPC::LWZ, 2, OutReg), FrameIndex);
}
} else if (Opc == PPC::FMR) {
// FIXME: We would be able to fold this, but we don't know whether to use a
// 32- or 64-bit load/store :(.
// We currently always spill FP values as doubles. :(
if (OpNum == 0) { // move -> store
unsigned InReg = MI->getOperand(1).getReg();
return addFrameReference(BuildMI(PPC::STFD,
3).addReg(InReg), FrameIndex);
} else { // move -> load
unsigned OutReg = MI->getOperand(0).getReg();
return addFrameReference(BuildMI(PPC::LFD, 2, OutReg), FrameIndex);
}
}
return 0;
}