From 0f17d0da4a9c3da0e2488eab1aee63adfaf8504f Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Tue, 22 Mar 2016 14:29:53 +0000 Subject: [PATCH] [mips] Range check simm5. Summary: We can't check the error message for this one because there's another lw/sw available that covers a larger range. We therefore check the transition between the two sizes. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D18144 llvm-svn: 264054 --- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 3 +++ llvm/lib/Target/Mips/MipsInstrInfo.td | 6 ++++-- llvm/lib/Target/Mips/MipsMSAInstrInfo.td | 1 - llvm/test/MC/Mips/micromips32r6/valid.s | 3 +++ 4 files changed, 10 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 32c6ffd34408..41d8d2484b80 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -3729,6 +3729,9 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, case Match_UImm5_0: return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected 5-bit unsigned immediate"); + case Match_SImm5_0: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected 5-bit signed immediate"); case Match_UImm5_1: return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected immediate in range 1 .. 32"); diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 8fa1c83b26b9..3de29995869a 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -507,8 +507,10 @@ def ConstantUImm5Plus1AsmOperandClass 5, [ConstantUImm5Plus32NormalizeAsmOperandClass], 1>; def ConstantUImm5AsmOperandClass : ConstantUImmAsmOperandClass<5, [ConstantUImm5Plus1AsmOperandClass]>; +def ConstantSImm5AsmOperandClass + : ConstantSImmAsmOperandClass<5, [ConstantUImm5AsmOperandClass]>; def ConstantUImm4AsmOperandClass - : ConstantUImmAsmOperandClass<4, [ConstantUImm5AsmOperandClass]>; + : ConstantUImmAsmOperandClass<4, [ConstantSImm5AsmOperandClass]>; def ConstantSImm4AsmOperandClass : ConstantSImmAsmOperandClass<4, [ConstantUImm4AsmOperandClass]>; def ConstantUImm3AsmOperandClass @@ -724,7 +726,7 @@ foreach I = {1, 2, 3, 4, 5, 6, 8} in } // Signed operands -foreach I = {4} in +foreach I = {4, 5} in def simm # I : Operand { let DecoderMethod = "DecodeSImmWithOffset<" # I # ">"; let ParserMatchClass = diff --git a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td index 5ecc3b3fb66c..89e530b8e10b 100644 --- a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td @@ -70,7 +70,6 @@ def immZExt4Ptr : ImmLeaf(Imm);}]>; // Operands -def simm5 : Operand; def vsplat_simm5 : Operand; diff --git a/llvm/test/MC/Mips/micromips32r6/valid.s b/llvm/test/MC/Mips/micromips32r6/valid.s index 9cd217dbfa9e..cce34cf89508 100644 --- a/llvm/test/MC/Mips/micromips32r6/valid.s +++ b/llvm/test/MC/Mips/micromips32r6/valid.s @@ -80,6 +80,7 @@ sub $3, $4, $5 # CHECK: sub $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x90] subu $3, $4, $5 # CHECK: subu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xd0] sw $4, 124($sp) # CHECK: sw $4, 124($sp) # encoding: [0xc8,0x9f] + sw $4, 128($sp) # CHECK: sw $4, 128($sp) # encoding: [0xf8,0x9d,0x00,0x80] sw16 $4, 4($17) # CHECK: sw16 $4, 4($17) # encoding: [0xea,0x11] sw16 $0, 4($17) # CHECK: sw16 $zero, 4($17) # encoding: [0xe8,0x11] swm $16, $17, $ra, 8($sp) # CHECK: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x2a] @@ -189,6 +190,8 @@ rsqrt.d $f2, $f4 # CHECK: rsqrt.d $f2, $f4 # encoding: [0x54,0x44,0x42,0x3b] lw $3, 32($gp) # CHECK: lw $3, 32($gp) # encoding: [0x65,0x88] lw $3, 24($sp) # CHECK: lw $3, 24($sp) # encoding: [0x48,0x66] + lw $3, 124($sp) # CHECK: lw $3, 124($sp) # encoding: [0x48,0x7f] + lw $3, 128($sp) # CHECK: lw $3, 128($sp) # encoding: [0xfc,0x7d,0x00,0x80] lw16 $4, 8($17) # CHECK: lw16 $4, 8($17) # encoding: [0x6a,0x12] lhu16 $3, 4($16) # CHECK: lhu16 $3, 4($16) # encoding: [0x29,0x82] lbu16 $3, 4($17) # CHECK: lbu16 $3, 4($17) # encoding: [0x09,0x94]