[ReachingDefAnalysis] Fix what I assume to be a typo ReachingDedDefaultVal->ReachingDefDefaultVal.

Unless Ded has some many I don't know about.

llvm-svn: 328043
This commit is contained in:
Craig Topper 2018-03-20 20:53:21 +00:00
parent 3f689c8632
commit 0f110a88be
2 changed files with 5 additions and 5 deletions

View File

@ -68,7 +68,7 @@ private:
MBBReachingDefsInfo MBBReachingDefs;
/// Default values are 'nothing happened a long time ago'.
const int ReachingDedDefaultVal = -(1 << 20);
const int ReachingDefDefaultVal = -(1 << 20);
public:
static char ID; // Pass identification, replacement for typeid

View File

@ -34,7 +34,7 @@ void ReachingDefAnalysis::enterBasicBlock(
// Set up LiveRegs to represent registers entering MBB.
// Default values are 'nothing happened a long time ago'.
if (LiveRegs.empty())
LiveRegs.assign(NumRegUnits, ReachingDedDefaultVal);
LiveRegs.assign(NumRegUnits, ReachingDefDefaultVal);
// This is the entry block.
if (MBB->pred_empty()) {
@ -64,7 +64,7 @@ void ReachingDefAnalysis::enterBasicBlock(
for (unsigned Unit = 0; Unit != NumRegUnits; ++Unit) {
// Use the most recent predecessor def for each register.
LiveRegs[Unit] = std::max(LiveRegs[Unit], Incoming[Unit]);
if ((LiveRegs[Unit] != ReachingDedDefaultVal))
if ((LiveRegs[Unit] != ReachingDefDefaultVal))
MBBReachingDefs[MBBNumber][Unit].push_back(LiveRegs[Unit]);
}
}
@ -173,11 +173,11 @@ void ReachingDefAnalysis::releaseMemory() {
int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, int PhysReg) {
assert(InstIds.count(MI) && "Unexpected machine instuction.");
int InstId = InstIds[MI];
int DefRes = ReachingDedDefaultVal;
int DefRes = ReachingDefDefaultVal;
unsigned MBBNumber = MI->getParent()->getNumber();
assert(MBBNumber < MBBReachingDefs.size() &&
"Unexpected basic block number.");
int LatestDef = ReachingDedDefaultVal;
int LatestDef = ReachingDefDefaultVal;
for (MCRegUnitIterator Unit(PhysReg, TRI); Unit.isValid(); ++Unit) {
for (int Def : MBBReachingDefs[MBBNumber][*Unit]) {
if (Def >= InstId)