forked from OSchip/llvm-project
[ReachingDefAnalysis] Fix what I assume to be a typo ReachingDedDefaultVal->ReachingDefDefaultVal.
Unless Ded has some many I don't know about. llvm-svn: 328043
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@ -68,7 +68,7 @@ private:
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MBBReachingDefsInfo MBBReachingDefs;
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/// Default values are 'nothing happened a long time ago'.
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const int ReachingDedDefaultVal = -(1 << 20);
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const int ReachingDefDefaultVal = -(1 << 20);
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public:
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static char ID; // Pass identification, replacement for typeid
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@ -34,7 +34,7 @@ void ReachingDefAnalysis::enterBasicBlock(
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// Set up LiveRegs to represent registers entering MBB.
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// Default values are 'nothing happened a long time ago'.
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if (LiveRegs.empty())
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LiveRegs.assign(NumRegUnits, ReachingDedDefaultVal);
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LiveRegs.assign(NumRegUnits, ReachingDefDefaultVal);
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// This is the entry block.
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if (MBB->pred_empty()) {
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@ -64,7 +64,7 @@ void ReachingDefAnalysis::enterBasicBlock(
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for (unsigned Unit = 0; Unit != NumRegUnits; ++Unit) {
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// Use the most recent predecessor def for each register.
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LiveRegs[Unit] = std::max(LiveRegs[Unit], Incoming[Unit]);
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if ((LiveRegs[Unit] != ReachingDedDefaultVal))
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if ((LiveRegs[Unit] != ReachingDefDefaultVal))
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MBBReachingDefs[MBBNumber][Unit].push_back(LiveRegs[Unit]);
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}
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}
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@ -173,11 +173,11 @@ void ReachingDefAnalysis::releaseMemory() {
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int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, int PhysReg) {
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assert(InstIds.count(MI) && "Unexpected machine instuction.");
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int InstId = InstIds[MI];
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int DefRes = ReachingDedDefaultVal;
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int DefRes = ReachingDefDefaultVal;
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unsigned MBBNumber = MI->getParent()->getNumber();
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assert(MBBNumber < MBBReachingDefs.size() &&
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"Unexpected basic block number.");
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int LatestDef = ReachingDedDefaultVal;
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int LatestDef = ReachingDefDefaultVal;
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for (MCRegUnitIterator Unit(PhysReg, TRI); Unit.isValid(); ++Unit) {
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for (int Def : MBBReachingDefs[MBBNumber][*Unit]) {
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if (Def >= InstId)
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