maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Change asserts at the top of getVectorShuffle to check that LHS and RHS have the same type as the result. 

Previously the asserts were only checking that RHS and LHS were the same type and had the same element type as the result. All downstream code for ISD::VECTOR_SHUFFLE requires the types to be the same.

Also removed one unnecessary check of matched element counts that was present in the code.

llvm-svn: 188051
This commit is contained in:
Craig Topper 2013-08-09 04:37:24 +00:00
parent 114394f824
commit 0ecb26a79e
1 changed files with 3 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -1298,11 +1298,8 @@ static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
SDValue N2, const int *Mask) {
assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
assert(VT.isVector() && N1.getValueType().isVector() &&
"Vector Shuffle VTs must be a vectors");
assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
&& "Vector Shuffle VTs must have same element type");
assert(VT == N1.getValueType() && VT == N2.getValueType() &&
"Invalid VECTOR_SHUFFLE");
// Canonicalize shuffle undef, undef -> undef
if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
@ -1356,7 +1353,7 @@ SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
for (unsigned i = 0; i != NElts; ++i) {
if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
}
if (Identity && NElts == N1.getValueType().getVectorNumElements())
if (Identity && NElts)
return N1;
FoldingSetNodeID ID;