forked from OSchip/llvm-project
[LLDB] Add an llvm::Optional version of GetRegisterInfo
We have some 500 ish uses of the bool plus ref version so changing them all at once isn't a great idea. This adds an overload that doesn't take a RegisterInfo& and returns an optional. Once I'm done switching all the existing callers I'll remove the original function. Benefits of optional over bool plus ref: * The intent of the function is clear from the prototype. * It's harder to forget to check if the return is valid, and if you do you'll get an assert. * You don't hide ununsed variables, which happens because passing by ref marks a variable used. * You can't forget to reset the RegisterInfo in between calls. Reviewed By: clayborg Differential Revision: https://reviews.llvm.org/D134536
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6602110152
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0e912417c6
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@ -375,8 +375,11 @@ public:
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virtual bool TestEmulation(Stream *out_stream, ArchSpec &arch,
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OptionValueDictionary *test_data) = 0;
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virtual bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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RegisterInfo ®_info) = 0;
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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RegisterInfo ®_info);
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virtual llvm::Optional<RegisterInfo>
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GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) = 0;
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// Optional overrides
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virtual bool SetInstruction(const Opcode &insn_opcode,
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@ -582,3 +582,12 @@ bool EmulateInstruction::CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) {
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unwind_plan.Clear();
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return false;
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}
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bool EmulateInstruction::GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_num,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo> info = GetRegisterInfo(reg_kind, reg_num);
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if (info)
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reg_info = *info;
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return info.has_value();
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}
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@ -42,7 +42,8 @@ LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM, InstructionARM)
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// ITSession implementation
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//
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static bool GetARMDWARFRegisterInfo(unsigned reg_num, RegisterInfo ®_info) {
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static llvm::Optional<RegisterInfo> GetARMDWARFRegisterInfo(unsigned reg_num) {
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RegisterInfo reg_info;
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::memset(®_info, 0, sizeof(RegisterInfo));
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::memset(reg_info.kinds, LLDB_INVALID_REGNUM, sizeof(reg_info.kinds));
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@ -594,9 +595,9 @@ static bool GetARMDWARFRegisterInfo(unsigned reg_num, RegisterInfo ®_info) {
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break;
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default:
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return false;
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return {};
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}
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return true;
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return reg_info;
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}
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// A8.6.50
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@ -782,9 +783,9 @@ bool EmulateInstructionARM::WriteBits32Unknown(int n) {
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return true;
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}
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bool EmulateInstructionARM::GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_num,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo>
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EmulateInstructionARM::GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_num) {
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if (reg_kind == eRegisterKindGeneric) {
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switch (reg_num) {
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case LLDB_REGNUM_GENERIC_PC:
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@ -808,13 +809,13 @@ bool EmulateInstructionARM::GetRegisterInfo(lldb::RegisterKind reg_kind,
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reg_num = dwarf_cpsr;
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break;
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default:
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return false;
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return {};
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}
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}
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if (reg_kind == eRegisterKindDWARF)
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return GetARMDWARFRegisterInfo(reg_num, reg_info);
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return false;
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return GetARMDWARFRegisterInfo(reg_num);
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return {};
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}
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uint32_t EmulateInstructionARM::GetFramePointerRegisterNumber() const {
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@ -135,8 +135,9 @@ public:
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bool TestEmulation(Stream *out_stream, ArchSpec &arch,
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OptionValueDictionary *test_data) override;
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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RegisterInfo ®_info) override;
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using EmulateInstruction::GetRegisterInfo;
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llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_num) override;
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bool CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) override;
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@ -51,11 +51,10 @@ using namespace lldb_private;
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LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM64, InstructionARM64)
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static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) {
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static llvm::Optional<RegisterInfo> LLDBTableGetRegisterInfo(uint32_t reg_num) {
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if (reg_num >= std::size(g_register_infos_arm64_le))
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return false;
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reg_info = g_register_infos_arm64_le[reg_num];
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return true;
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return {};
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return g_register_infos_arm64_le[reg_num];
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}
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#define No_VFP 0
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@ -144,9 +143,9 @@ bool EmulateInstructionARM64::SetTargetTriple(const ArchSpec &arch) {
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return false;
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}
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bool EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo>
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EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num) {
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if (reg_kind == eRegisterKindGeneric) {
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switch (reg_num) {
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case LLDB_REGNUM_GENERIC_PC:
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@ -171,13 +170,13 @@ bool EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
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break;
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default:
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return false;
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return {};
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}
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}
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if (reg_kind == eRegisterKindLLDB)
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return LLDBTableGetRegisterInfo(reg_num, reg_info);
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return false;
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return LLDBTableGetRegisterInfo(reg_num);
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return {};
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}
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EmulateInstructionARM64::Opcode *
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@ -65,8 +65,10 @@ public:
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return false;
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}
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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lldb_private::RegisterInfo ®_info) override;
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using EmulateInstruction::GetRegisterInfo;
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llvm::Optional<lldb_private::RegisterInfo>
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GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
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bool
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CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
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@ -585,9 +585,9 @@ const char *EmulateInstructionMIPS::GetRegisterName(unsigned reg_num,
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return nullptr;
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}
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bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo>
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EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num) {
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if (reg_kind == eRegisterKindGeneric) {
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switch (reg_num) {
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case LLDB_REGNUM_GENERIC_PC:
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@ -611,11 +611,12 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
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reg_num = dwarf_sr_mips;
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break;
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default:
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return false;
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return {};
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}
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}
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if (reg_kind == eRegisterKindDWARF) {
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RegisterInfo reg_info;
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::memset(®_info, 0, sizeof(RegisterInfo));
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::memset(reg_info.kinds, LLDB_INVALID_REGNUM, sizeof(reg_info.kinds));
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@ -636,7 +637,7 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
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reg_info.format = eFormatVectorOfUInt8;
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reg_info.encoding = eEncodingVector;
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} else {
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return false;
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return {};
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}
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reg_info.name = GetRegisterName(reg_num, false);
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@ -662,9 +663,9 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
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default:
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break;
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}
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return true;
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return reg_info;
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}
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return false;
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return {};
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}
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EmulateInstructionMIPS::MipsOpcode *
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@ -80,8 +80,10 @@ public:
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return false;
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}
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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lldb_private::RegisterInfo ®_info) override;
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using EmulateInstruction::GetRegisterInfo;
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llvm::Optional<lldb_private::RegisterInfo>
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GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
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bool
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CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
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@ -572,9 +572,9 @@ const char *EmulateInstructionMIPS64::GetRegisterName(unsigned reg_num,
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return nullptr;
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}
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bool EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo>
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EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num) {
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if (reg_kind == eRegisterKindGeneric) {
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switch (reg_num) {
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case LLDB_REGNUM_GENERIC_PC:
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reg_num = dwarf_sr_mips64;
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break;
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default:
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return false;
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return {};
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}
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}
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if (reg_kind == eRegisterKindDWARF) {
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RegisterInfo reg_info;
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::memset(®_info, 0, sizeof(RegisterInfo));
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::memset(reg_info.kinds, LLDB_INVALID_REGNUM, sizeof(reg_info.kinds));
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reg_info.format = eFormatVectorOfUInt8;
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reg_info.encoding = eEncodingVector;
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} else {
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return false;
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return {};
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}
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reg_info.name = GetRegisterName(reg_num, false);
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default:
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break;
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}
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return true;
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return reg_info;
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}
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return false;
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return {};
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}
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EmulateInstructionMIPS64::MipsOpcode *
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@ -72,8 +72,10 @@ public:
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return false;
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}
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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lldb_private::RegisterInfo ®_info) override;
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using EmulateInstruction::GetRegisterInfo;
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llvm::Optional<lldb_private::RegisterInfo>
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GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
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bool
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CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
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@ -58,16 +58,15 @@ bool EmulateInstructionPPC64::SetTargetTriple(const ArchSpec &arch) {
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return arch.GetTriple().isPPC64();
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}
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static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) {
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static llvm::Optional<RegisterInfo> LLDBTableGetRegisterInfo(uint32_t reg_num) {
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if (reg_num >= std::size(g_register_infos_ppc64le))
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return false;
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reg_info = g_register_infos_ppc64le[reg_num];
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return true;
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return {};
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return g_register_infos_ppc64le[reg_num];
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}
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bool EmulateInstructionPPC64::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo>
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EmulateInstructionPPC64::GetRegisterInfo(RegisterKind reg_kind,
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uint32_t reg_num) {
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if (reg_kind == eRegisterKindGeneric) {
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switch (reg_num) {
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case LLDB_REGNUM_GENERIC_PC:
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break;
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default:
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return false;
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return {};
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}
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}
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if (reg_kind == eRegisterKindLLDB)
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return LLDBTableGetRegisterInfo(reg_num, reg_info);
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return false;
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return LLDBTableGetRegisterInfo(reg_num);
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return {};
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}
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bool EmulateInstructionPPC64::ReadInstruction() {
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@ -61,8 +61,10 @@ public:
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return false;
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}
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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RegisterInfo ®_info) override;
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using EmulateInstruction::GetRegisterInfo;
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llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_num) override;
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bool CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) override;
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@ -1286,9 +1286,9 @@ bool EmulateInstructionRISCV::WritePC(lldb::addr_t pc) {
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LLDB_REGNUM_GENERIC_PC, pc);
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}
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bool EmulateInstructionRISCV::GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_index,
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RegisterInfo ®_info) {
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llvm::Optional<RegisterInfo>
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EmulateInstructionRISCV::GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_index) {
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if (reg_kind == eRegisterKindGeneric) {
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switch (reg_index) {
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case LLDB_REGNUM_GENERIC_PC:
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RegisterInfoPOSIX_riscv64::GetRegisterInfoCount(m_arch);
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if (reg_index >= length || reg_kind != eRegisterKindLLDB)
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return false;
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return {};
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reg_info = array[reg_index];
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return true;
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return array[reg_index];
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}
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bool EmulateInstructionRISCV::SetTargetTriple(const ArchSpec &arch) {
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@ -76,8 +76,10 @@ public:
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bool EvaluateInstruction(uint32_t options) override;
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bool TestEmulation(Stream *out_stream, ArchSpec &arch,
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OptionValueDictionary *test_data) override;
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bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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RegisterInfo ®_info) override;
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using EmulateInstruction::GetRegisterInfo;
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llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
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uint32_t reg_num) override;
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lldb::addr_t ReadPC(bool &success);
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bool WritePC(lldb::addr_t pc);
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