[LLDB] Add an llvm::Optional version of GetRegisterInfo

We have some 500 ish uses of the bool plus ref version
so changing them all at once isn't a great idea.

This adds an overload that doesn't take a RegisterInfo&
and returns an optional.

Once I'm done switching all the existing callers I'll
remove the original function.

Benefits of optional over bool plus ref:
* The intent of the function is clear from the prototype.
* It's harder to forget to check if the return is valid,
  and if you do you'll get an assert.
* You don't hide ununsed variables, which happens because
  passing by ref marks a variable used.
* You can't forget to reset the RegisterInfo in between
  calls.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D134536
This commit is contained in:
David Spickett 2022-09-23 14:28:36 +00:00
parent 6602110152
commit 0e912417c6
14 changed files with 86 additions and 63 deletions

View File

@ -375,8 +375,11 @@ public:
virtual bool TestEmulation(Stream *out_stream, ArchSpec &arch,
OptionValueDictionary *test_data) = 0;
virtual bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
RegisterInfo &reg_info) = 0;
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
RegisterInfo &reg_info);
virtual llvm::Optional<RegisterInfo>
GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) = 0;
// Optional overrides
virtual bool SetInstruction(const Opcode &insn_opcode,

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@ -582,3 +582,12 @@ bool EmulateInstruction::CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) {
unwind_plan.Clear();
return false;
}
bool EmulateInstruction::GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_num,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo> info = GetRegisterInfo(reg_kind, reg_num);
if (info)
reg_info = *info;
return info.has_value();
}

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@ -42,7 +42,8 @@ LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM, InstructionARM)
// ITSession implementation
//
static bool GetARMDWARFRegisterInfo(unsigned reg_num, RegisterInfo &reg_info) {
static llvm::Optional<RegisterInfo> GetARMDWARFRegisterInfo(unsigned reg_num) {
RegisterInfo reg_info;
::memset(&reg_info, 0, sizeof(RegisterInfo));
::memset(reg_info.kinds, LLDB_INVALID_REGNUM, sizeof(reg_info.kinds));
@ -594,9 +595,9 @@ static bool GetARMDWARFRegisterInfo(unsigned reg_num, RegisterInfo &reg_info) {
break;
default:
return false;
return {};
}
return true;
return reg_info;
}
// A8.6.50
@ -782,9 +783,9 @@ bool EmulateInstructionARM::WriteBits32Unknown(int n) {
return true;
}
bool EmulateInstructionARM::GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_num,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo>
EmulateInstructionARM::GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_num) {
if (reg_kind == eRegisterKindGeneric) {
switch (reg_num) {
case LLDB_REGNUM_GENERIC_PC:
@ -808,13 +809,13 @@ bool EmulateInstructionARM::GetRegisterInfo(lldb::RegisterKind reg_kind,
reg_num = dwarf_cpsr;
break;
default:
return false;
return {};
}
}
if (reg_kind == eRegisterKindDWARF)
return GetARMDWARFRegisterInfo(reg_num, reg_info);
return false;
return GetARMDWARFRegisterInfo(reg_num);
return {};
}
uint32_t EmulateInstructionARM::GetFramePointerRegisterNumber() const {

View File

@ -135,8 +135,9 @@ public:
bool TestEmulation(Stream *out_stream, ArchSpec &arch,
OptionValueDictionary *test_data) override;
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
RegisterInfo &reg_info) override;
using EmulateInstruction::GetRegisterInfo;
llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_num) override;
bool CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) override;

View File

@ -51,11 +51,10 @@ using namespace lldb_private;
LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM64, InstructionARM64)
static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo &reg_info) {
static llvm::Optional<RegisterInfo> LLDBTableGetRegisterInfo(uint32_t reg_num) {
if (reg_num >= std::size(g_register_infos_arm64_le))
return false;
reg_info = g_register_infos_arm64_le[reg_num];
return true;
return {};
return g_register_infos_arm64_le[reg_num];
}
#define No_VFP 0
@ -144,9 +143,9 @@ bool EmulateInstructionARM64::SetTargetTriple(const ArchSpec &arch) {
return false;
}
bool EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo>
EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num) {
if (reg_kind == eRegisterKindGeneric) {
switch (reg_num) {
case LLDB_REGNUM_GENERIC_PC:
@ -171,13 +170,13 @@ bool EmulateInstructionARM64::GetRegisterInfo(RegisterKind reg_kind,
break;
default:
return false;
return {};
}
}
if (reg_kind == eRegisterKindLLDB)
return LLDBTableGetRegisterInfo(reg_num, reg_info);
return false;
return LLDBTableGetRegisterInfo(reg_num);
return {};
}
EmulateInstructionARM64::Opcode *

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@ -65,8 +65,10 @@ public:
return false;
}
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
lldb_private::RegisterInfo &reg_info) override;
using EmulateInstruction::GetRegisterInfo;
llvm::Optional<lldb_private::RegisterInfo>
GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
bool
CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;

View File

@ -585,9 +585,9 @@ const char *EmulateInstructionMIPS::GetRegisterName(unsigned reg_num,
return nullptr;
}
bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo>
EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num) {
if (reg_kind == eRegisterKindGeneric) {
switch (reg_num) {
case LLDB_REGNUM_GENERIC_PC:
@ -611,11 +611,12 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
reg_num = dwarf_sr_mips;
break;
default:
return false;
return {};
}
}
if (reg_kind == eRegisterKindDWARF) {
RegisterInfo reg_info;
::memset(&reg_info, 0, sizeof(RegisterInfo));
::memset(reg_info.kinds, LLDB_INVALID_REGNUM, sizeof(reg_info.kinds));
@ -636,7 +637,7 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
reg_info.format = eFormatVectorOfUInt8;
reg_info.encoding = eEncodingVector;
} else {
return false;
return {};
}
reg_info.name = GetRegisterName(reg_num, false);
@ -662,9 +663,9 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind,
default:
break;
}
return true;
return reg_info;
}
return false;
return {};
}
EmulateInstructionMIPS::MipsOpcode *

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@ -80,8 +80,10 @@ public:
return false;
}
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
lldb_private::RegisterInfo &reg_info) override;
using EmulateInstruction::GetRegisterInfo;
llvm::Optional<lldb_private::RegisterInfo>
GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
bool
CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;

View File

@ -572,9 +572,9 @@ const char *EmulateInstructionMIPS64::GetRegisterName(unsigned reg_num,
return nullptr;
}
bool EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo>
EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num) {
if (reg_kind == eRegisterKindGeneric) {
switch (reg_num) {
case LLDB_REGNUM_GENERIC_PC:
@ -598,11 +598,12 @@ bool EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
reg_num = dwarf_sr_mips64;
break;
default:
return false;
return {};
}
}
if (reg_kind == eRegisterKindDWARF) {
RegisterInfo reg_info;
::memset(&reg_info, 0, sizeof(RegisterInfo));
::memset(reg_info.kinds, LLDB_INVALID_REGNUM, sizeof(reg_info.kinds));
@ -623,7 +624,7 @@ bool EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
reg_info.format = eFormatVectorOfUInt8;
reg_info.encoding = eEncodingVector;
} else {
return false;
return {};
}
reg_info.name = GetRegisterName(reg_num, false);
@ -649,9 +650,9 @@ bool EmulateInstructionMIPS64::GetRegisterInfo(RegisterKind reg_kind,
default:
break;
}
return true;
return reg_info;
}
return false;
return {};
}
EmulateInstructionMIPS64::MipsOpcode *

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@ -72,8 +72,10 @@ public:
return false;
}
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
lldb_private::RegisterInfo &reg_info) override;
using EmulateInstruction::GetRegisterInfo;
llvm::Optional<lldb_private::RegisterInfo>
GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num) override;
bool
CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;

View File

@ -58,16 +58,15 @@ bool EmulateInstructionPPC64::SetTargetTriple(const ArchSpec &arch) {
return arch.GetTriple().isPPC64();
}
static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo &reg_info) {
static llvm::Optional<RegisterInfo> LLDBTableGetRegisterInfo(uint32_t reg_num) {
if (reg_num >= std::size(g_register_infos_ppc64le))
return false;
reg_info = g_register_infos_ppc64le[reg_num];
return true;
return {};
return g_register_infos_ppc64le[reg_num];
}
bool EmulateInstructionPPC64::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo>
EmulateInstructionPPC64::GetRegisterInfo(RegisterKind reg_kind,
uint32_t reg_num) {
if (reg_kind == eRegisterKindGeneric) {
switch (reg_num) {
case LLDB_REGNUM_GENERIC_PC:
@ -88,13 +87,13 @@ bool EmulateInstructionPPC64::GetRegisterInfo(RegisterKind reg_kind,
break;
default:
return false;
return {};
}
}
if (reg_kind == eRegisterKindLLDB)
return LLDBTableGetRegisterInfo(reg_num, reg_info);
return false;
return LLDBTableGetRegisterInfo(reg_num);
return {};
}
bool EmulateInstructionPPC64::ReadInstruction() {

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@ -61,8 +61,10 @@ public:
return false;
}
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
RegisterInfo &reg_info) override;
using EmulateInstruction::GetRegisterInfo;
llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_num) override;
bool CreateFunctionEntryUnwind(UnwindPlan &unwind_plan) override;

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@ -1286,9 +1286,9 @@ bool EmulateInstructionRISCV::WritePC(lldb::addr_t pc) {
LLDB_REGNUM_GENERIC_PC, pc);
}
bool EmulateInstructionRISCV::GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_index,
RegisterInfo &reg_info) {
llvm::Optional<RegisterInfo>
EmulateInstructionRISCV::GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_index) {
if (reg_kind == eRegisterKindGeneric) {
switch (reg_index) {
case LLDB_REGNUM_GENERIC_PC:
@ -1320,10 +1320,9 @@ bool EmulateInstructionRISCV::GetRegisterInfo(lldb::RegisterKind reg_kind,
RegisterInfoPOSIX_riscv64::GetRegisterInfoCount(m_arch);
if (reg_index >= length || reg_kind != eRegisterKindLLDB)
return false;
return {};
reg_info = array[reg_index];
return true;
return array[reg_index];
}
bool EmulateInstructionRISCV::SetTargetTriple(const ArchSpec &arch) {

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@ -76,8 +76,10 @@ public:
bool EvaluateInstruction(uint32_t options) override;
bool TestEmulation(Stream *out_stream, ArchSpec &arch,
OptionValueDictionary *test_data) override;
bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
RegisterInfo &reg_info) override;
using EmulateInstruction::GetRegisterInfo;
llvm::Optional<RegisterInfo> GetRegisterInfo(lldb::RegisterKind reg_kind,
uint32_t reg_num) override;
lldb::addr_t ReadPC(bool &success);
bool WritePC(lldb::addr_t pc);