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Revert "Strip metadata when speculatively hoisting instructions" 

This reverts commit r252604, as it broke all ARM and AArch64 buildbots, as
well as some x86, et al.

llvm-svn: 252623
This commit is contained in:
Renato Golin 2015-11-10 18:01:16 +00:00
parent fe68904fa6
commit 0e77d72b0a
6 changed files with 1 additions and 87 deletions
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7
llvm/lib/Analysis/LoopInfo.cpp
View File

@ -120,13 +120,6 @@ bool Loop::makeLoopInvariant(Instruction *I, bool &Changed,
// Hoist.
I->moveBefore(InsertPt);
// There is possibility of hoisting this instruction above some arbitrary
// condition. Any metadata defined on it can be control dependent on this
// condition. Conservatively strip it here so that we don't give any wrong
// information to the optimizer.
I->dropUnknownNonDebugMetadata();
Changed = true;
return true;
}

4
llvm/lib/Transforms/Scalar/LICM.cpp
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@ -672,10 +672,6 @@ static bool hoist(Instruction &I, BasicBlock *Preheader) {
// Move the new node to the Preheader, before its terminator.
I.moveBefore(Preheader->getTerminator());
// Metadata can be dependent on the condition we are hoisting above.
// Conservatively strip all metadata on the instruction.
I.dropUnknownNonDebugMetadata();
if (isa<LoadInst>(I)) ++NumMovedLoads;
else if (isa<CallInst>(I)) ++NumMovedCalls;
++NumHoisted;

5
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
View File

@ -1618,11 +1618,6 @@ static bool SpeculativelyExecuteBB(BranchInst *BI, BasicBlock *ThenBB,
SpeculatedStore->setOperand(0, S);
}
// Metadata can be dependent on the condition we are hoisting above.
// Conservatively strip all metadata on the instruction.
for (auto &I: *ThenBB)
I.dropUnknownNonDebugMetadata();
// Hoist the instructions.
BB->getInstList().splice(BI->getIterator(), ThenBB->getInstList(),
ThenBB->begin(), std::prev(ThenBB->end()));

2
llvm/test/Analysis/TypeBasedAliasAnalysis/licm.ll
View File

@ -5,7 +5,7 @@
; CHECK: @foo
; CHECK: entry:
; CHECK-NEXT: %tmp3 = load double*, double** @P
; CHECK-NEXT: %tmp3 = load double*, double** @P, !tbaa !0
; CHECK-NEXT: br label %for.body
@P = common global double* null

44
llvm/test/Transforms/LICM/hoist-deref-load.ll
View File

@ -388,49 +388,5 @@ for.end: ; preds = %for.inc, %entry
ret void
}
; In this test we should be able to only hoist load from %cptr. We can't hoist
; load from %c because it's dereferenceability can depend on %cmp1 condition.
; By moving it out of the loop we break this dependency and can not rely
; on the dereferenceability anymore.
; In other words this test checks that we strip dereferenceability metadata
; after hoisting an instruction.
; CHECK-LABEL: @test10
; CHECK: %c = load i32*, i32** %cptr
; CHECK-NOT: dereferenceable
; CHECK: if.then:
; CHECK: load i32, i32* %c, align 4
define void @test10(i32* noalias %a, i32* %b, i32** dereferenceable(8) %cptr, i32 %n) #0 {
entry:
%cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.end
for.body: ; preds = %entry, %for.inc
%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]
%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
%0 = load i32, i32* %arrayidx, align 4
%cmp1 = icmp sgt i32 %0, 0
br i1 %cmp1, label %if.then, label %for.inc
if.then: ; preds = %for.body
%c = load i32*, i32** %cptr, !dereferenceable !0
%1 = load i32, i32* %c, align 4
%arrayidx3 = getelementptr inbounds i32, i32* %b, i64 %indvars.iv
%2 = load i32, i32* %arrayidx3, align 4
%mul = mul nsw i32 %2, %1
store i32 %mul, i32* %arrayidx, align 4
br label %for.inc
for.inc: ; preds = %for.body, %if.then
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp eq i32 %lftr.wideiv, %n
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.inc, %entry
ret void
}
attributes #0 = { nounwind uwtable }
!0 = !{i64 4}

26
llvm/test/Transforms/SimplifyCFG/SpeculativeExec.ll
View File

@ -69,29 +69,3 @@ end:
ret i8* %x10
}
define i32* @test5(i32 %a, i32 %b, i32 %c, i32* dereferenceable(10) %ptr1,
i32* dereferenceable(10) %ptr2, i32** dereferenceable(10) %ptr3) nounwind {
; CHECK-LABEL: @test5(
entry:
%tmp1 = icmp eq i32 %b, 0
br i1 %tmp1, label %bb1, label %bb3
bb1: ; preds = %entry
%tmp2 = icmp sgt i32 %c, 1
br i1 %tmp2, label %bb2, label %bb3
; CHECK: bb1:
; CHECK-NEXT: icmp sgt i32 %c, 1
; CHECK-NEXT: load i32*, i32** %ptr3
; CHECK-NOT: dereferenceable
; CHECK-NEXT: select i1 %tmp2, i32* %tmp3, i32* %ptr2
; CHECK-NEXT: ret i32* %tmp3.ptr2
bb2: ; preds = bb1
%tmp3 = load i32*, i32** %ptr3, !dereferenceable !{i64 10}
br label %bb3
bb3: ; preds = %bb2, %entry
%tmp4 = phi i32* [ %ptr1, %entry ], [ %ptr2, %bb1 ], [ %tmp3, %bb2 ]
ret i32* %tmp4
}