forked from OSchip/llvm-project
[SystemZ] Update test case (NFC)
test/CodeGen/SystemZ/vec-trunc-to-i1.ll was marked as a temporary FAIL when it was previously updated when it needed one more COPY. This was however wrong, since the loop body had been reduced significantly, and it was actually an improvement. Review: Ulrich Weigand. llvm-svn: 324060
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@ -2,7 +2,6 @@
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;
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;
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; Check that a widening truncate to a vector of i1 elements can be handled.
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; Check that a widening truncate to a vector of i1 elements can be handled.
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; NOTE: REG2 is actually not needed (tempororary FAIL)
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define void @pr32275(<4 x i8> %B15) {
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define void @pr32275(<4 x i8> %B15) {
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; CHECK-LABEL: pr32275:
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; CHECK-LABEL: pr32275:
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; CHECK: # %bb.0: # %BB
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; CHECK: # %bb.0: # %BB
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@ -11,9 +10,10 @@ define void @pr32275(<4 x i8> %B15) {
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; CHECK-NEXT: vlgvb %r1, %v24, 1
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; CHECK-NEXT: vlgvb %r1, %v24, 1
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; CHECK-NEXT: vlvgp [[REG1:%v[0-9]]], %r1, %r0
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; CHECK-NEXT: vlvgp [[REG1:%v[0-9]]], %r1, %r0
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; CHECK-NEXT: vlgvb %r0, %v24, 0
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; CHECK-NEXT: vlgvb %r0, %v24, 0
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; CHECK-NEXT: vlgvb [[REG3:%r[0-9]]], %v24, 2
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; CHECK: .LBB0_1:
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; CHECK-DAG: vlr [[REG2:%v[0-9]]], [[REG1]]
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; CHECK-DAG: vlr [[REG2:%v[0-9]]], [[REG1]]
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; CHECK-DAG: vlvgf [[REG2]], %r0, 0
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; CHECK-DAG: vlvgf [[REG2]], %r0, 0
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; CHECK-DAG: vlgvb [[REG3:%r[0-9]]], %v24, 2
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; CHECK-NEXT: vlvgf [[REG2]], [[REG3]], 2
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; CHECK-NEXT: vlvgf [[REG2]], [[REG3]], 2
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; CHECK-NEXT: vn [[REG2]], [[REG2]], [[REG0]]
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; CHECK-NEXT: vn [[REG2]], [[REG2]], [[REG0]]
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; CHECK-NEXT: vlgvf [[REG4:%r[0-9]]], [[REG2]], 3
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; CHECK-NEXT: vlgvf [[REG4:%r[0-9]]], [[REG2]], 3
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