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Fix the PPC regressions last night 

llvm-svn: 31752
This commit is contained in:
Chris Lattner 2006-11-15 17:40:51 +00:00
parent e3a63d136d
commit 0e117c7e9d
2 changed files with 7 additions and 7 deletions
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2
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
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@ -364,7 +364,7 @@ def STDX : XForm_8<31, 149, (ops G8RC:$rS, memrr:$dst),
[(store G8RC:$rS, xaddr:$dst)]>, isPPC64, [(store G8RC:$rS, xaddr:$dst)]>, isPPC64,
PPC970_DGroup_Cracked; PPC970_DGroup_Cracked;
def STDU : DSForm_1<62, 1, (ops G8RC:$rS, memrix:$dst), def STDU : DSForm_1<62, 1, (ops G8RC:$ea_res, G8RC:$rS, memrix:$dst),
"stdu $rS, $dst", LdStSTD, "stdu $rS, $dst", LdStSTD,
[]>, isPPC64; []>, isPPC64;
def STDUX : XForm_8<31, 181, (ops G8RC:$rS, memrr:$dst), def STDUX : XForm_8<31, 181, (ops G8RC:$rS, memrr:$dst),

12
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@ -418,11 +418,11 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) { if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) {
if (!Subtarget.isPPC64()) { if (!Subtarget.isPPC64()) {
BuildMI(MBB, I, PPC::LWZ, 2, PPC::R0).addImm(0).addReg(PPC::R31); BuildMI(MBB, I, PPC::LWZ, 2, PPC::R0).addImm(0).addReg(PPC::R31);
BuildMI(MBB, I, PPC::STWU, 3) BuildMI(MBB, I, PPC::STWU, 3, PPC::R1)
.addReg(PPC::R0).addImm(-Amount).addReg(PPC::R1); .addReg(PPC::R0).addImm(-Amount).addReg(PPC::R1);
} else { } else {
BuildMI(MBB, I, PPC::LD, 2, PPC::X0).addImm(0).addReg(PPC::X31); BuildMI(MBB, I, PPC::LD, 2, PPC::X0).addImm(0).addReg(PPC::X31);
BuildMI(MBB, I, PPC::STDU, 3) BuildMI(MBB, I, PPC::STDU, 3, PPC::X1)
.addReg(PPC::X0).addImm(-Amount/4).addReg(PPC::X1); .addReg(PPC::X0).addImm(-Amount/4).addReg(PPC::X1);
} }
} else { } else {
@ -684,8 +684,8 @@ void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
BuildMI(MBB, MBBI, PPC::STWUX, 3) BuildMI(MBB, MBBI, PPC::STWUX, 3)
.addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0); .addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
} else if (NumBytes <= 32768) { } else if (NumBytes <= 32768) {
BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addImm(NegNumbytes) BuildMI(MBB, MBBI, PPC::STWU, 3,
.addReg(PPC::R1); PPC::R1).addReg(PPC::R1).addImm(NegNumbytes).addReg(PPC::R1);
} else { } else {
BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addImm(NegNumbytes >> 16); BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addImm(NegNumbytes >> 16);
BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0).addReg(PPC::R0) BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
@ -704,8 +704,8 @@ void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
BuildMI(MBB, MBBI, PPC::STDUX, 3) BuildMI(MBB, MBBI, PPC::STDUX, 3)
.addReg(PPC::X1).addReg(PPC::X1).addReg(PPC::X0); .addReg(PPC::X1).addReg(PPC::X1).addReg(PPC::X0);
} else if (NumBytes <= 32768*4) { } else if (NumBytes <= 32768*4) {
BuildMI(MBB, MBBI, PPC::STDU, 3).addReg(PPC::X1).addImm(NegNumbytes/4) BuildMI(MBB, MBBI, PPC::STDU, 3, PPC::X1)
.addReg(PPC::X1); .addReg(PPC::X1).addImm(NegNumbytes/4).addReg(PPC::X1);
} else { } else {
BuildMI(MBB, MBBI, PPC::LIS8, 1, PPC::X0).addImm(NegNumbytes >> 16); BuildMI(MBB, MBBI, PPC::LIS8, 1, PPC::X0).addImm(NegNumbytes >> 16);
BuildMI(MBB, MBBI, PPC::ORI8, 2, PPC::X0).addReg(PPC::X0) BuildMI(MBB, MBBI, PPC::ORI8, 2, PPC::X0).addReg(PPC::X0)