forked from OSchip/llvm-project
[hwasan] Prevent reordering of tag checks.
They were previously unconstrained, which allowed them to be reordered before the shadow memory write. Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D107901
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@ -1570,10 +1570,10 @@ def int_load_relative: DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_a
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def int_hwasan_check_memaccess :
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Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty, llvm_i32_ty],
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[IntrInaccessibleMemOnly, ImmArg<ArgIndex<2>>]>;
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[ImmArg<ArgIndex<2>>]>;
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def int_hwasan_check_memaccess_shortgranules :
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Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty, llvm_i32_ty],
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[IntrInaccessibleMemOnly, ImmArg<ArgIndex<2>>]>;
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[ImmArg<ArgIndex<2>>]>;
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// Xray intrinsics
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//===----------------------------------------------------------------------===//
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@ -0,0 +1,20 @@
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; Make sure memaccess checks preceed the following reads.
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;
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; RUN: opt < %s -S -enable-new-pm=0 -hwasan -basic-aa -memdep -print-memdeps -analyze -mtriple aarch64-linux-android30 | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-android10000"
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declare void @use32(i32*)
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define i32 @test_alloca() sanitize_hwaddress {
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entry:
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%x = alloca i32, align 4
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call void @use32(i32* nonnull %x)
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; CHECK: Clobber from: call void @llvm.hwasan.check.memaccess.shortgranule
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; CHECK-NEXT: load i32, i32* %x.hwasan, align 4
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%y = load i32, i32* %x
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; CHECK: Clobber from: %y = load i32, i32* %x.hwasan, align 4
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; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 {{.*}}, i8 0, i64 1, i1 false)
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ret i32 %y
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}
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