diff --git a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp index 94a5355c9167..236942cb6efd 100644 --- a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp +++ b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp @@ -220,7 +220,8 @@ protected: bool needMigrateBlock(MachineBasicBlock *MBB) const; // Utility Functions - void reversePredicateSetter(MachineBasicBlock::iterator I); + void reversePredicateSetter(MachineBasicBlock::iterator I, + MachineBasicBlock &MBB); /// Compute the reversed DFS post order of Blocks void orderBlocks(MachineFunction *MF); @@ -422,9 +423,11 @@ bool AMDGPUCFGStructurizer::needMigrateBlock(MachineBasicBlock *MBB) const { } void AMDGPUCFGStructurizer::reversePredicateSetter( - MachineBasicBlock::iterator I) { + MachineBasicBlock::iterator I, MachineBasicBlock &MBB) { assert(I.isValid() && "Expected valid iterator"); for (;; --I) { + if (I == MBB.end()) + continue; if (I->getOpcode() == AMDGPU::PRED_X) { switch (I->getOperand(2).getImm()) { case OPCODE_IS_ZERO_INT: @@ -991,7 +994,7 @@ int AMDGPUCFGStructurizer::ifPatternMatch(MachineBasicBlock *MBB) { // Triangle pattern, true is empty // We reverse the predicate to make a triangle, empty false pattern; std::swap(TrueMBB, FalseMBB); - reversePredicateSetter(MBB->end()); + reversePredicateSetter(MBB->end(), *MBB); LandBlk = FalseMBB; FalseMBB = nullptr; } else if (FalseMBB->succ_size() == 1 @@ -1501,7 +1504,7 @@ void AMDGPUCFGStructurizer::mergeLoopbreakBlock(MachineBasicBlock *ExitingMBB, MachineBasicBlock *TrueBranch = getTrueBranch(BranchMI); MachineBasicBlock::iterator I = BranchMI; if (TrueBranch != LandMBB) - reversePredicateSetter(I); + reversePredicateSetter(I, *I->getParent()); insertCondBranchBefore(ExitingMBB, I, AMDGPU::IF_PREDICATE_SET, AMDGPU::PREDICATE_BIT, DL); insertInstrBefore(I, AMDGPU::BREAK); insertInstrBefore(I, AMDGPU::ENDIF); diff --git a/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp b/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp index 93ed5be94a54..783dba43aaf7 100644 --- a/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp +++ b/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp @@ -307,7 +307,7 @@ public: BB != BB_E; ++BB) { MachineBasicBlock &MBB = *BB; MachineBasicBlock::iterator I = MBB.begin(); - if (I->getOpcode() == AMDGPU::CF_ALU) + if (I != MBB.end() && I->getOpcode() == AMDGPU::CF_ALU) continue; // BB was already parsed for (MachineBasicBlock::iterator E = MBB.end(); I != E;) { if (isALU(*I)) diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index 21854affe5aa..560fe0a16df8 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -205,6 +205,8 @@ const R600Subtarget *R600TargetLowering::getSubtarget() const { } static inline bool isEOP(MachineBasicBlock::iterator I) { + if (std::next(I) == I->getParent()->end()) + return false; return std::next(I)->getOpcode() == AMDGPU::RETURN; } diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp index 9e972a569a0f..7c220306cc5c 100644 --- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp +++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp @@ -158,10 +158,11 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::findMatchingDSInst(MachineBasicBlock::iterator I, unsigned EltSize){ MachineBasicBlock::iterator E = I->getParent()->end(); + MachineBasicBlock &MBB = *I->getParent(); MachineBasicBlock::iterator MBBI = I; ++MBBI; - if (MBBI->getOpcode() != I->getOpcode()) + if (MBBI == MBB.end() || MBBI->getOpcode() != I->getOpcode()) return E; // Don't merge volatiles. diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp index 7318e788a22a..9f5a0c6134c6 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -156,8 +156,10 @@ static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF); - unsigned Opc = MBBI->getOpcode(); - switch (Opc) { + if (MBBI == MBB.end()) + return 0; + + switch (MBBI->getOpcode()) { default: return 0; case TargetOpcode::PATCHABLE_RET: case X86::RET: