forked from OSchip/llvm-project
[X86] Remove dead code from the handler for INTR_TYPE_SCALAR_MASK_RM.
The code in here handles nodes with 6 or 7 operands. But only the 6 operand case is ever used these days. llvm-svn: 355788
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@ -22026,24 +22026,14 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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Mask, passThru, Subtarget, DAG);
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Mask, passThru, Subtarget, DAG);
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}
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}
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case INTR_TYPE_SCALAR_MASK_RM: {
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case INTR_TYPE_SCALAR_MASK_RM: {
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assert(Op.getNumOperands() == 6 && "Unexpected number of operands");
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SDValue Src1 = Op.getOperand(1);
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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SDValue Src2 = Op.getOperand(2);
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SDValue Src0 = Op.getOperand(3);
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SDValue Src0 = Op.getOperand(3);
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SDValue Mask = Op.getOperand(4);
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SDValue Mask = Op.getOperand(4);
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// There are 2 kinds of intrinsics in this group:
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SDValue Rnd = Op.getOperand(5);
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// (1) With suppress-all-exceptions (sae) or rounding mode- 6 operands
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// (2) With rounding mode and sae - 7 operands.
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if (Op.getNumOperands() == 6) {
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SDValue Sae = Op.getOperand(5);
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return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, Src2,
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Sae),
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Mask, Src0, Subtarget, DAG);
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}
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assert(Op.getNumOperands() == 7 && "Unexpected intrinsic form");
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SDValue RoundingMode = Op.getOperand(5);
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SDValue Sae = Op.getOperand(6);
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return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, Src2,
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return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, Src2,
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RoundingMode, Sae),
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Rnd),
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Mask, Src0, Subtarget, DAG);
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Mask, Src0, Subtarget, DAG);
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}
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}
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case INTR_TYPE_2OP_MASK: {
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case INTR_TYPE_2OP_MASK: {
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