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Fix order of b and blx instrction in EmulateInstructionARM 

In the previous ordering some "blx <label>" instruction was recognised
as "b #imm24" instructions causing a failure in the instruction
emulator.

Differential revision: http://reviews.llvm.org/D9218

llvm-svn: 235714
This commit is contained in:
Tamas Berghammer 2015-04-24 12:13:41 +00:00
parent 04f7144907
commit 0da3ee1ef3
1 changed files with 2 additions and 2 deletions
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4
lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
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@ -12349,9 +12349,9 @@ EmulateInstructionARM::GetARMOpcodeForInstruction (const uint32_t opcode, uint32
//----------------------------------------------------------------------
// Branch instructions
//----------------------------------------------------------------------
{ 0x0f000000, 0x0a000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateB, "b #imm24"},
// To resolve ambiguity, "blx <label>" should come before "bl <label>".
// To resolve ambiguity, "blx <label>" should come before "b #imm24" and "bl <label>".
{ 0xfe000000, 0xfa000000, ARMV5_ABOVE, eEncodingA2, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXImmediate, "blx <label>"},
{ 0x0f000000, 0x0a000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateB, "b #imm24"},
{ 0x0f000000, 0x0b000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXImmediate, "bl <label>"},
{ 0x0ffffff0, 0x012fff30, ARMV5_ABOVE, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXRm, "blx <Rm>"},
// for example, "bx lr"