Use the range variant of find instead of unpacking begin/end

If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

llvm-svn: 278433

llvm/examples/Kaleidoscope/include/KaleidoscopeJIT.h

@@ -72,8 +72,7 @@ public:
   }
 
   void removeModule(ModuleHandleT H) {
-    ModuleHandles.erase(
+    ModuleHandles.erase(find(ModuleHandles, H));
-        std::find(ModuleHandles.begin(), ModuleHandles.end(), H));
     CompileLayer.removeModuleSet(H);
   }
 

llvm/include/llvm/ADT/PriorityQueue.h

@@ -46,8 +46,7 @@ public:
   ///
   void erase_one(const T &t) {
     // Linear-search to find the element.
-    typename Sequence::size_type i =
+    typename Sequence::size_type i = find(this->c, t) - this->c.begin();
-      std::find(this->c.begin(), this->c.end(), t) - this->c.begin();
 
     // Logarithmic-time heap bubble-up.
     while (i != 0) {

llvm/include/llvm/ADT/SetVector.h

@@ -21,6 +21,7 @@
 #define LLVM_ADT_SETVECTOR_H
 
 #include "llvm/ADT/DenseSet.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallSet.h"
 #include <algorithm>
 #include <cassert>
@@ -143,8 +144,7 @@ public:
   /// \brief Remove an item from the set vector.
   bool remove(const value_type& X) {
     if (set_.erase(X)) {
-      typename vector_type::iterator I =
+      typename vector_type::iterator I = find(vector_, X);
-        std::find(vector_.begin(), vector_.end(), X);
       assert(I != vector_.end() && "Corrupted SetVector instances!");
       vector_.erase(I);
       return true;

llvm/include/llvm/Analysis/LoopInfo.h

@@ -329,7 +329,7 @@ public:
   /// Blocks as appropriate. This does not update the mapping in the LoopInfo
   /// class.
   void removeBlockFromLoop(BlockT *BB) {
-    auto I = std::find(Blocks.begin(), Blocks.end(), BB);
+    auto I = find(Blocks, BB);
     assert(I != Blocks.end() && "N is not in this list!");
     Blocks.erase(I);
 
@@ -594,7 +594,7 @@ public:
   /// loop.
   void changeTopLevelLoop(LoopT *OldLoop,
                           LoopT *NewLoop) {
-    auto I = std::find(TopLevelLoops.begin(), TopLevelLoops.end(), OldLoop);
+    auto I = find(TopLevelLoops, OldLoop);
     assert(I != TopLevelLoops.end() && "Old loop not at top level!");
     *I = NewLoop;
     assert(!NewLoop->ParentLoop && !OldLoop->ParentLoop &&

llvm/include/llvm/Analysis/LoopInfoImpl.h

@@ -211,8 +211,7 @@ void LoopBase<BlockT, LoopT>::
 replaceChildLoopWith(LoopT *OldChild, LoopT *NewChild) {
   assert(OldChild->ParentLoop == this && "This loop is already broken!");
   assert(!NewChild->ParentLoop && "NewChild already has a parent!");
-  typename std::vector<LoopT *>::iterator I =
+  typename std::vector<LoopT *>::iterator I = find(SubLoops, OldChild);
-    std::find(SubLoops.begin(), SubLoops.end(), OldChild);
   assert(I != SubLoops.end() && "OldChild not in loop!");
   *I = NewChild;
   OldChild->ParentLoop = nullptr;

llvm/include/llvm/CodeGen/LiveVariables.h

@@ -92,8 +92,7 @@ public:
     /// machine instruction. Returns true if there was a kill
     /// corresponding to this instruction, false otherwise.
     bool removeKill(MachineInstr &MI) {
-      std::vector<MachineInstr *>::iterator I =
+      std::vector<MachineInstr *>::iterator I = find(Kills, &MI);
-          std::find(Kills.begin(), Kills.end(), &MI);
       if (I == Kills.end())
         return false;
       Kills.erase(I);

llvm/include/llvm/CodeGen/MachineScheduler.h

@@ -518,9 +518,7 @@ public:
 
   ArrayRef<SUnit*> elements() { return Queue; }
 
-  iterator find(SUnit *SU) {
+  iterator find(SUnit *SU) { return llvm::find(Queue, SU); }
-    return std::find(Queue.begin(), Queue.end(), SU);
-  }
 
   void push(SUnit *SU) {
     Queue.push_back(SU);

llvm/include/llvm/CodeGen/PBQP/Graph.h

@@ -262,9 +262,7 @@ namespace PBQP {
 
     private:
       NodeId findNextInUse(NodeId NId) const {
-        while (NId < EndNId &&
+        while (NId < EndNId && is_contained(FreeNodeIds, NId)) {
-               std::find(FreeNodeIds.begin(), FreeNodeIds.end(), NId) !=
-               FreeNodeIds.end()) {
           ++NId;
         }
         return NId;
@@ -288,9 +286,7 @@ namespace PBQP {
 
     private:
       EdgeId findNextInUse(EdgeId EId) const {
-        while (EId < EndEId &&
+        while (EId < EndEId && is_contained(FreeEdgeIds, EId)) {
-               std::find(FreeEdgeIds.begin(), FreeEdgeIds.end(), EId) !=
-               FreeEdgeIds.end()) {
           ++EId;
         }
         return EId;

llvm/include/llvm/IR/InstrTypes.h

@@ -1478,7 +1478,7 @@ public:
   bool hasOperandBundlesOtherThan(ArrayRef<uint32_t> IDs) const {
     for (unsigned i = 0, e = getNumOperandBundles(); i != e; ++i) {
       uint32_t ID = getOperandBundleAt(i).getTagID();
-      if (std::find(IDs.begin(), IDs.end(), ID) == IDs.end())
+      if (!is_contained(IDs, ID))
         return true;
     }
     return false;

llvm/include/llvm/MC/MCAssembler.h

@@ -10,6 +10,7 @@
 #ifndef LLVM_MC_MCASSEMBLER_H
 #define LLVM_MC_MCASSEMBLER_H
 
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/ilist.h"
 #include "llvm/ADT/ilist_node.h"
@@ -402,8 +403,7 @@ public:
   ArrayRef<std::string> getFileNames() { return FileNames; }
 
   void addFileName(StringRef FileName) {
-    if (std::find(FileNames.begin(), FileNames.end(), FileName) ==
+    if (!is_contained(FileNames, FileName))
-        FileNames.end())
       FileNames.push_back(FileName);
   }
 

llvm/include/llvm/Support/GenericDomTree.h

@@ -126,7 +126,7 @@ public:
     assert(IDom && "No immediate dominator?");
     if (IDom != NewIDom) {
       typename std::vector<DomTreeNodeBase<NodeT> *>::iterator I =
-          std::find(IDom->Children.begin(), IDom->Children.end(), this);
+          find(IDom->Children, this);
       assert(I != IDom->Children.end() &&
              "Not in immediate dominator children set!");
       // I am no longer your child...
@@ -588,7 +588,7 @@ public:
     DomTreeNodeBase<NodeT> *IDom = Node->getIDom();
     if (IDom) {
       typename std::vector<DomTreeNodeBase<NodeT> *>::iterator I =
-          std::find(IDom->Children.begin(), IDom->Children.end(), Node);
+          find(IDom->Children, Node);
       assert(I != IDom->Children.end() &&
              "Not in immediate dominator children set!");
       // I am no longer your child...

llvm/lib/Analysis/EHPersonalities.cpp

@@ -82,7 +82,7 @@ DenseMap<BasicBlock *, ColorVector> llvm::colorEHFunclets(Function &F) {
     }
     // Note that this is a member of the given color.
     ColorVector &Colors = BlockColors[Visiting];
-    if (std::find(Colors.begin(), Colors.end(), Color) == Colors.end())
+    if (!is_contained(Colors, Color))
       Colors.push_back(Color);
     else
       continue;

llvm/lib/Analysis/GlobalsModRef.cpp

@@ -521,7 +521,7 @@ void GlobalsAAResult::AnalyzeCallGraph(CallGraph &CG, Module &M) {
             // Can't say anything about it.  However, if it is inside our SCC,
             // then nothing needs to be done.
             CallGraphNode *CalleeNode = CG[Callee];
-            if (std::find(SCC.begin(), SCC.end(), CalleeNode) == SCC.end())
+            if (!is_contained(SCC, CalleeNode))
               KnowNothing = true;
           }
         } else {

llvm/lib/Analysis/LazyCallGraph.cpp

@@ -907,8 +907,7 @@ void LazyCallGraph::RefSCC::removeOutgoingEdge(Node &SourceN, Node &TargetN) {
   RefSCC &TargetRC = *G->lookupRefSCC(TargetN);
   assert(&TargetRC != this && "The target must not be a member of this RefSCC");
 
-  assert(std::find(G->LeafRefSCCs.begin(), G->LeafRefSCCs.end(), this) ==
+  assert(!is_contained(G->LeafRefSCCs, this) &&
-             G->LeafRefSCCs.end() &&
          "Cannot have a leaf RefSCC source.");
 
   // First remove it from the node.

llvm/lib/Analysis/PHITransAddr.cpp

@@ -62,8 +62,7 @@ static bool VerifySubExpr(Value *Expr,
 
   // If it's an instruction, it is either in Tmp or its operands recursively
   // are.
-  SmallVectorImpl<Instruction*>::iterator Entry =
+  SmallVectorImpl<Instruction *>::iterator Entry = find(InstInputs, I);
-    std::find(InstInputs.begin(), InstInputs.end(), I);
   if (Entry != InstInputs.end()) {
     InstInputs.erase(Entry);
     return true;
@@ -126,8 +125,7 @@ static void RemoveInstInputs(Value *V,
   if (!I) return;
 
   // If the instruction is in the InstInputs list, remove it.
-  SmallVectorImpl<Instruction*>::iterator Entry =
+  SmallVectorImpl<Instruction *>::iterator Entry = find(InstInputs, I);
-    std::find(InstInputs.begin(), InstInputs.end(), I);
   if (Entry != InstInputs.end()) {
     InstInputs.erase(Entry);
     return;
@@ -150,8 +148,7 @@ Value *PHITransAddr::PHITranslateSubExpr(Value *V, BasicBlock *CurBB,
   if (!Inst) return V;
 
   // Determine whether 'Inst' is an input to our PHI translatable expression.
-  bool isInput =
+  bool isInput = is_contained(InstInputs, Inst);
-      std::find(InstInputs.begin(), InstInputs.end(), Inst) != InstInputs.end();
 
   // Handle inputs instructions if needed.
   if (isInput) {
@@ -165,7 +162,7 @@ Value *PHITransAddr::PHITranslateSubExpr(Value *V, BasicBlock *CurBB,
     // translated, we need to incorporate the value into the expression or fail.
 
     // In either case, the instruction itself isn't an input any longer.
-    InstInputs.erase(std::find(InstInputs.begin(), InstInputs.end(), Inst));
+    InstInputs.erase(find(InstInputs, Inst));
 
     // If this is a PHI, go ahead and translate it.
     if (PHINode *PN = dyn_cast<PHINode>(Inst))
@@ -272,8 +269,7 @@ Value *PHITransAddr::PHITranslateSubExpr(Value *V, BasicBlock *CurBB,
           isNSW = isNUW = false;
 
           // If the old 'LHS' was an input, add the new 'LHS' as an input.
-          if (std::find(InstInputs.begin(), InstInputs.end(), BOp) !=
+          if (is_contained(InstInputs, BOp)) {
-              InstInputs.end()) {
             RemoveInstInputs(BOp, InstInputs);
             AddAsInput(LHS);
           }

llvm/lib/CodeGen/AllocationOrder.cpp

@@ -48,7 +48,7 @@ AllocationOrder::AllocationOrder(unsigned VirtReg,
   });
 #ifndef NDEBUG
   for (unsigned I = 0, E = Hints.size(); I != E; ++I)
-    assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() &&
+    assert(is_contained(Order, Hints[I]) &&
            "Target hint is outside allocation order.");
 #endif
 }

llvm/lib/CodeGen/AllocationOrder.h

@@ -18,6 +18,7 @@
 #define LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/MC/MCRegisterInfo.h"
 
 namespace llvm {
@@ -79,9 +80,7 @@ public:
   bool isHint() const { return Pos <= 0; }
 
   /// Return true if PhysReg is a preferred register.
-  bool isHint(unsigned PhysReg) const {
+  bool isHint(unsigned PhysReg) const { return is_contained(Hints, PhysReg); }
-    return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end();
-  }
 };
 
 } // end namespace llvm

llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp

@@ -83,7 +83,7 @@ static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
   const auto &I = RegVars.find(RegNo);
   assert(RegNo != 0U && I != RegVars.end());
   auto &VarSet = I->second;
-  const auto &VarPos = std::find(VarSet.begin(), VarSet.end(), Var);
+  const auto &VarPos = find(VarSet, Var);
   assert(VarPos != VarSet.end());
   VarSet.erase(VarPos);
   // Don't keep empty sets in a map to keep it as small as possible.
@@ -96,7 +96,7 @@ static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
                                InlinedVariable Var) {
   assert(RegNo != 0U);
   auto &VarSet = RegVars[RegNo];
-  assert(std::find(VarSet.begin(), VarSet.end(), Var) == VarSet.end());
+  assert(!is_contained(VarSet, Var));
   VarSet.push_back(Var);
 }
 

llvm/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp

@@ -50,7 +50,7 @@ static void EmitCamlGlobal(const Module &M, AsmPrinter &AP, const char *Id) {
   std::string SymName;
   SymName += "caml";
   size_t Letter = SymName.size();
-  SymName.append(MId.begin(), std::find(MId.begin(), MId.end(), '.'));
+  SymName.append(MId.begin(), find(MId, '.'));
   SymName += "__";
   SymName += Id;
 

llvm/lib/CodeGen/CodeGenPrepare.cpp

@@ -3665,8 +3665,7 @@ isProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
     TPT.rollback(LastKnownGood);
 
     // If the match didn't cover I, then it won't be shared by it.
-    if (std::find(MatchedAddrModeInsts.begin(), MatchedAddrModeInsts.end(),
+    if (!is_contained(MatchedAddrModeInsts, I))
-                  I) == MatchedAddrModeInsts.end())
       return false;
 
     MatchedAddrModeInsts.clear();

llvm/lib/CodeGen/LatencyPriorityQueue.cpp

@@ -133,7 +133,7 @@ SUnit *LatencyPriorityQueue::pop() {
 
 void LatencyPriorityQueue::remove(SUnit *SU) {
   assert(!Queue.empty() && "Queue is empty!");
-  std::vector<SUnit *>::iterator I = std::find(Queue.begin(), Queue.end(), SU);
+  std::vector<SUnit *>::iterator I = find(Queue, SU);
   if (I != std::prev(Queue.end()))
     std::swap(*I, Queue.back());
   Queue.pop_back();

llvm/lib/CodeGen/LiveIntervalUnion.cpp

@@ -14,6 +14,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/LiveIntervalUnion.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SparseBitVector.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
@@ -102,9 +103,7 @@ void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) {
 // Scan the vector of interfering virtual registers in this union. Assume it's
 // quite small.
 bool LiveIntervalUnion::Query::isSeenInterference(LiveInterval *VirtReg) const {
-  SmallVectorImpl<LiveInterval*>::const_iterator I =
+  return is_contained(InterferingVRegs, VirtReg);
-    std::find(InterferingVRegs.begin(), InterferingVRegs.end(), VirtReg);
-  return I != InterferingVRegs.end();
 }
 
 // Collect virtual registers in this union that interfere with this

llvm/lib/CodeGen/MachineBasicBlock.cpp

@@ -545,7 +545,7 @@ void MachineBasicBlock::addSuccessorWithoutProb(MachineBasicBlock *Succ) {
 
 void MachineBasicBlock::removeSuccessor(MachineBasicBlock *Succ,
                                         bool NormalizeSuccProbs) {
-  succ_iterator I = std::find(Successors.begin(), Successors.end(), Succ);
+  succ_iterator I = find(Successors, Succ);
   removeSuccessor(I, NormalizeSuccProbs);
 }
 
@@ -611,7 +611,7 @@ void MachineBasicBlock::addPredecessor(MachineBasicBlock *Pred) {
 }
 
 void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {
-  pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), Pred);
+  pred_iterator I = find(Predecessors, Pred);
   assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
   Predecessors.erase(I);
 }
@@ -775,7 +775,7 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ,
           continue;
 
         unsigned Reg = OI->getReg();
-        if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end())
+        if (!is_contained(UsedRegs, Reg))
           UsedRegs.push_back(Reg);
       }
     }
@@ -802,9 +802,8 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ,
 
     for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(),
         E = Terminators.end(); I != E; ++I) {
-      if (std::find(NewTerminators.begin(), NewTerminators.end(), *I) ==
+      if (!is_contained(NewTerminators, *I))
-          NewTerminators.end())
+        Indexes->removeMachineInstrFromMaps(**I);
-       Indexes->removeMachineInstrFromMaps(**I);
     }
   }
 

llvm/lib/CodeGen/MachineBlockPlacement.cpp

@@ -1166,8 +1166,7 @@ void MachineBlockPlacement::rotateLoop(BlockChain &LoopChain,
     }
   }
 
-  BlockChain::iterator ExitIt =
+  BlockChain::iterator ExitIt = find(LoopChain, ExitingBB);
-      std::find(LoopChain.begin(), LoopChain.end(), ExitingBB);
   if (ExitIt == LoopChain.end())
     return;
 
@@ -1190,7 +1189,7 @@ void MachineBlockPlacement::rotateLoop(BlockChain &LoopChain,
 void MachineBlockPlacement::rotateLoopWithProfile(
     BlockChain &LoopChain, MachineLoop &L, const BlockFilterSet &LoopBlockSet) {
   auto HeaderBB = L.getHeader();
-  auto HeaderIter = std::find(LoopChain.begin(), LoopChain.end(), HeaderBB);
+  auto HeaderIter = find(LoopChain, HeaderBB);
   auto RotationPos = LoopChain.end();
 
   BlockFrequency SmallestRotationCost = BlockFrequency::getMaxFrequency();

llvm/lib/CodeGen/MachineCopyPropagation.cpp

@@ -245,7 +245,7 @@ void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
       // Remember source that's copied to Def. Once it's clobbered, then
       // it's no longer available for copy propagation.
       RegList &DestList = SrcMap[Src];
-      if (std::find(DestList.begin(), DestList.end(), Def) == DestList.end())
+      if (!is_contained(DestList, Def))
         DestList.push_back(Def);
 
       continue;

llvm/lib/CodeGen/MachineLICM.cpp

@@ -92,8 +92,7 @@ namespace {
     SmallVector<MachineBasicBlock*, 8> ExitBlocks;
 
     bool isExitBlock(const MachineBasicBlock *MBB) const {
-      return std::find(ExitBlocks.begin(), ExitBlocks.end(), MBB) !=
+      return is_contained(ExitBlocks, MBB);
-        ExitBlocks.end();
     }
 
     // Track 'estimated' register pressure.

llvm/lib/CodeGen/MachineVerifier.cpp

@@ -1238,7 +1238,7 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
     if (LiveVars && TargetRegisterInfo::isVirtualRegister(Reg) &&
         MO->isKill()) {
       LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg);
-      if (std::find(VI.Kills.begin(), VI.Kills.end(), MI) == VI.Kills.end())
+      if (!is_contained(VI.Kills, MI))
         report("Kill missing from LiveVariables", MO, MONum);
     }
 

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -1571,8 +1571,7 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
         break;
 
       case ISD::TokenFactor:
-        if (Op.hasOneUse() &&
+        if (Op.hasOneUse() && !is_contained(TFs, Op.getNode())) {
-            std::find(TFs.begin(), TFs.end(), Op.getNode()) == TFs.end()) {
           // Queue up for processing.
           TFs.push_back(Op.getNode());
           // Clean up in case the token factor is removed.

llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

@@ -599,8 +599,7 @@ void llvm::AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
 unsigned FunctionLoweringInfo::findSwiftErrorVReg(const MachineBasicBlock *MBB,
                                                   const Value* Val) const {
   // Find the index in SwiftErrorVals.
-  SwiftErrorValues::const_iterator I =
+  SwiftErrorValues::const_iterator I = find(SwiftErrorVals, Val);
-      std::find(SwiftErrorVals.begin(), SwiftErrorVals.end(), Val);
   assert(I != SwiftErrorVals.end() && "Can't find value in SwiftErrorVals");
   return SwiftErrorMap.lookup(MBB)[I - SwiftErrorVals.begin()];
 }
@@ -608,8 +607,7 @@ unsigned FunctionLoweringInfo::findSwiftErrorVReg(const MachineBasicBlock *MBB,
 void FunctionLoweringInfo::setSwiftErrorVReg(const MachineBasicBlock *MBB,
                                              const Value* Val, unsigned VReg) {
   // Find the index in SwiftErrorVals.
-  SwiftErrorValues::iterator I =
+  SwiftErrorValues::iterator I = find(SwiftErrorVals, Val);
-      std::find(SwiftErrorVals.begin(), SwiftErrorVals.end(), Val);
   assert(I != SwiftErrorVals.end() && "Can't find value in SwiftErrorVals");
   SwiftErrorMap[MBB][I - SwiftErrorVals.begin()] = VReg;
 }

llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp

@@ -631,7 +631,7 @@ SUnit *ResourcePriorityQueue::pop() {
 
 void ResourcePriorityQueue::remove(SUnit *SU) {
   assert(!Queue.empty() && "Queue is empty!");
-  std::vector<SUnit *>::iterator I = std::find(Queue.begin(), Queue.end(), SU);
+  std::vector<SUnit *>::iterator I = find(Queue, SU);
   if (I != std::prev(Queue.end()))
     std::swap(*I, Queue.back());
 

llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

@@ -1339,7 +1339,7 @@ void ScheduleDAGRRList::releaseInterferences(unsigned Reg) {
     LRegsMapT::iterator LRegsPos = LRegsMap.find(SU);
     if (Reg) {
       SmallVectorImpl<unsigned> &LRegs = LRegsPos->second;
-      if (std::find(LRegs.begin(), LRegs.end(), Reg) == LRegs.end())
+      if (!is_contained(LRegs, Reg))
         continue;
     }
     SU->isPending = false;
@@ -1704,8 +1704,7 @@ public:
   void remove(SUnit *SU) override {
     assert(!Queue.empty() && "Queue is empty!");
     assert(SU->NodeQueueId != 0 && "Not in queue!");
-    std::vector<SUnit *>::iterator I = std::find(Queue.begin(), Queue.end(),
+    std::vector<SUnit *>::iterator I = find(Queue, SU);
-                                                 SU);
     if (I != std::prev(Queue.end()))
       std::swap(*I, Queue.back());
     Queue.pop_back();

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

@@ -3388,7 +3388,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
         SelectionDAG::DAGNodeDeletedListener NDL(*CurDAG, [&](SDNode *N,
                                                               SDNode *E) {
           auto &Chain = ChainNodesMatched;
-          assert((!E || llvm::find(Chain, N) == Chain.end()) &&
+          assert((!E || !is_contained(Chain, N)) &&
                  "Chain node replaced during MorphNode");
           Chain.erase(std::remove(Chain.begin(), Chain.end(), N), Chain.end());
         });

llvm/lib/CodeGen/TailDuplicator.cpp

@@ -900,7 +900,7 @@ bool TailDuplicator::tailDuplicate(MachineFunction &MF, bool IsSimple,
                                                         PE = Preds.end();
        PI != PE; ++PI) {
     MachineBasicBlock *PredBB = *PI;
-    if (std::find(TDBBs.begin(), TDBBs.end(), PredBB) != TDBBs.end())
+    if (is_contained(TDBBs, PredBB))
       continue;
 
     // EH edges

llvm/lib/CodeGen/TargetInstrInfo.cpp

@@ -467,7 +467,7 @@ static MachineInstr *foldPatchpoint(MachineFunction &MF, MachineInstr &MI,
 
   for (unsigned i = StartIdx; i < MI.getNumOperands(); ++i) {
     MachineOperand &MO = MI.getOperand(i);
-    if (std::find(Ops.begin(), Ops.end(), i) != Ops.end()) {
+    if (is_contained(Ops, i)) {
       unsigned SpillSize;
       unsigned SpillOffset;
       // Compute the spill slot size and offset.

llvm/lib/CodeGen/TargetRegisterInfo.cpp

@@ -354,7 +354,7 @@ TargetRegisterInfo::getRegAllocationHints(unsigned VirtReg,
   // Check that Phys is in the allocation order. We shouldn't heed hints
   // from VirtReg's register class if they aren't in the allocation order. The
   // target probably has a reason for removing the register.
-  if (std::find(Order.begin(), Order.end(), Phys) == Order.end())
+  if (!is_contained(Order, Phys))
     return;
 
   // All clear, tell the register allocator to prefer this register.

llvm/lib/IR/LegacyPassManager.cpp

@@ -841,9 +841,7 @@ bool PMDataManager::preserveHigherLevelAnalysis(Pass *P) {
          E = HigherLevelAnalysis.end(); I  != E; ++I) {
     Pass *P1 = *I;
     if (P1->getAsImmutablePass() == nullptr &&
-        std::find(PreservedSet.begin(), PreservedSet.end(),
+        !is_contained(PreservedSet, P1->getPassID()))
-                  P1->getPassID()) ==
-           PreservedSet.end())
       return false;
   }
 
@@ -881,8 +879,7 @@ void PMDataManager::removeNotPreservedAnalysis(Pass *P) {
          E = AvailableAnalysis.end(); I != E; ) {
     DenseMap<AnalysisID, Pass*>::iterator Info = I++;
     if (Info->second->getAsImmutablePass() == nullptr &&
-        std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) ==
+        !is_contained(PreservedSet, Info->first)) {
-        PreservedSet.end()) {
       // Remove this analysis
       if (PassDebugging >= Details) {
         Pass *S = Info->second;
@@ -905,8 +902,7 @@ void PMDataManager::removeNotPreservedAnalysis(Pass *P) {
            E = InheritedAnalysis[Index]->end(); I != E; ) {
       DenseMap<AnalysisID, Pass *>::iterator Info = I++;
       if (Info->second->getAsImmutablePass() == nullptr &&
-          std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) ==
+          !is_contained(PreservedSet, Info->first)) {
-             PreservedSet.end()) {
         // Remove this analysis
         if (PassDebugging >= Details) {
           Pass *S = Info->second;

llvm/lib/IR/PassRegistry.cpp

@@ -13,6 +13,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/PassRegistry.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/PassSupport.h"
 #include "llvm/Support/ManagedStatic.h"
 
@@ -121,6 +122,6 @@ void PassRegistry::addRegistrationListener(PassRegistrationListener *L) {
 void PassRegistry::removeRegistrationListener(PassRegistrationListener *L) {
   sys::SmartScopedWriter<true> Guard(Lock);
 
-  auto I = std::find(Listeners.begin(), Listeners.end(), L);
+  auto I = find(Listeners, L);
   Listeners.erase(I);
 }

llvm/lib/Option/OptTable.cpp

@@ -8,6 +8,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Option/OptTable.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Option/Arg.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Option/Option.h"
@@ -142,8 +143,7 @@ OptTable::OptTable(ArrayRef<Info> OptionInfos, bool IgnoreCase)
     StringRef Prefix = I->getKey();
     for (StringRef::const_iterator C = Prefix.begin(), CE = Prefix.end();
                                    C != CE; ++C)
-      if (std::find(PrefixChars.begin(), PrefixChars.end(), *C)
+      if (!is_contained(PrefixChars, *C))
-            == PrefixChars.end())
         PrefixChars.push_back(*C);
   }
 }

llvm/lib/Support/CommandLine.cpp

@@ -2101,7 +2101,7 @@ void cl::AddExtraVersionPrinter(void (*func)()) {
 StringMap<Option *> &cl::getRegisteredOptions(SubCommand &Sub) {
   auto &Subs = GlobalParser->RegisteredSubCommands;
   (void)Subs;
-  assert(std::find(Subs.begin(), Subs.end(), &Sub) != Subs.end());
+  assert(is_contained(Subs, &Sub));
   return Sub.OptionsMap;
 }
 

llvm/lib/Support/YAMLParser.cpp

@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Support/YAMLParser.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringExtras.h"
@@ -802,8 +803,7 @@ Token &Scanner::peekNext() {
     removeStaleSimpleKeyCandidates();
     SimpleKey SK;
     SK.Tok = TokenQueue.begin();
-    if (std::find(SimpleKeys.begin(), SimpleKeys.end(), SK)
+    if (!is_contained(SimpleKeys, SK))
-        == SimpleKeys.end())
       break;
     else
       NeedMore = true;

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -4976,7 +4976,7 @@ SDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op,
 
     // Add this element source to the list if it's not already there.
     SDValue SourceVec = V.getOperand(0);
-    auto Source = std::find(Sources.begin(), Sources.end(), SourceVec);
+    auto Source = find(Sources, SourceVec);
     if (Source == Sources.end())
       Source = Sources.insert(Sources.end(), ShuffleSourceInfo(SourceVec));
 
@@ -5092,7 +5092,7 @@ SDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op,
     if (Entry.isUndef())
       continue;
 
-    auto Src = std::find(Sources.begin(), Sources.end(), Entry.getOperand(0));
+    auto Src = find(Sources, Entry.getOperand(0));
     int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
 
     // EXTRACT_VECTOR_ELT performs an implicit any_ext; BUILD_VECTOR an implicit

llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp

@@ -535,7 +535,7 @@ bool AMDGPUPromoteAlloca::collectUsesWithPtrTypes(
   std::vector<Value*> &WorkList) const {
 
   for (User *User : Val->users()) {
-    if (std::find(WorkList.begin(), WorkList.end(), User) != WorkList.end())
+    if (is_contained(WorkList, User))
       continue;
 
     if (CallInst *CI = dyn_cast<CallInst>(User)) {

llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp

@@ -200,12 +200,10 @@ MachineInstr *R600VectorRegMerger::RebuildVector(
         .addReg(SubReg)
         .addImm(Chan);
     UpdatedRegToChan[SubReg] = Chan;
-    std::vector<unsigned>::iterator ChanPos =
+    std::vector<unsigned>::iterator ChanPos = find(UpdatedUndef, Chan);
-        std::find(UpdatedUndef.begin(), UpdatedUndef.end(), Chan);
     if (ChanPos != UpdatedUndef.end())
       UpdatedUndef.erase(ChanPos);
-    assert(std::find(UpdatedUndef.begin(), UpdatedUndef.end(), Chan) ==
+    assert(!is_contained(UpdatedUndef, Chan) &&
-               UpdatedUndef.end() &&
            "UpdatedUndef shouldn't contain Chan more than once!");
     DEBUG(dbgs() << "    ->"; Tmp->dump(););
     (void)Tmp;
@@ -236,12 +234,12 @@ void R600VectorRegMerger::RemoveMI(MachineInstr *MI) {
   for (InstructionSetMap::iterator It = PreviousRegSeqByReg.begin(),
       E = PreviousRegSeqByReg.end(); It != E; ++It) {
     std::vector<MachineInstr *> &MIs = (*It).second;
-    MIs.erase(std::find(MIs.begin(), MIs.end(), MI), MIs.end());
+    MIs.erase(find(MIs, MI), MIs.end());
   }
   for (InstructionSetMap::iterator It = PreviousRegSeqByUndefCount.begin(),
       E = PreviousRegSeqByUndefCount.end(); It != E; ++It) {
     std::vector<MachineInstr *> &MIs = (*It).second;
-    MIs.erase(std::find(MIs.begin(), MIs.end(), MI), MIs.end());
+    MIs.erase(find(MIs, MI), MIs.end());
   }
 }
 

llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp

@@ -363,7 +363,7 @@ void SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) {
 
     std::vector<BasicBlock*> Preds;
     for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB); PI != PE; ++PI) {
-      if (std::find(Latches.begin(), Latches.end(), *PI) == Latches.end())
+      if (!is_contained(Latches, *PI))
         Preds.push_back(*PI);
     }
     BB = llvm::SplitBlockPredecessors(BB, Preds, "endcf.split", DT, LI, false);

llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp

@@ -479,8 +479,7 @@ void SIScheduleBlock::releaseSuccessors(SUnit *SU, bool InOrOutBlock) {
 void SIScheduleBlock::nodeScheduled(SUnit *SU) {
   // Is in TopReadySUs
   assert (!SU->NumPredsLeft);
-  std::vector<SUnit*>::iterator I =
+  std::vector<SUnit *>::iterator I = find(TopReadySUs, SU);
-    std::find(TopReadySUs.begin(), TopReadySUs.end(), SU);
   if (I == TopReadySUs.end()) {
     dbgs() << "Data Structure Bug in SI Scheduler\n";
     llvm_unreachable(nullptr);

llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp

@@ -289,8 +289,7 @@ ARMBaseRegisterInfo::getRegAllocationHints(unsigned VirtReg,
   }
 
   // First prefer the paired physreg.
-  if (PairedPhys &&
+  if (PairedPhys && is_contained(Order, PairedPhys))
-      std::find(Order.begin(), Order.end(), PairedPhys) != Order.end())
     Hints.push_back(PairedPhys);
 
   // Then prefer even or odd registers.

llvm/lib/Target/ARM/ARMConstantIslandPass.cpp

@@ -1432,7 +1432,7 @@ bool ARMConstantIslands::handleConstantPoolUser(unsigned CPUserIndex,
     // it.  Check for this so it will be removed from the WaterList.
     // Also remove any entry from NewWaterList.
     MachineBasicBlock *WaterBB = &*--NewMBB->getIterator();
-    IP = std::find(WaterList.begin(), WaterList.end(), WaterBB);
+    IP = find(WaterList, WaterBB);
     if (IP != WaterList.end())
       NewWaterList.erase(WaterBB);
 

llvm/lib/Target/ARM/ARMFrameLowering.cpp

@@ -1640,8 +1640,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
       SavedRegs.set(ARM::LR);
       NumGPRSpills++;
       SmallVectorImpl<unsigned>::iterator LRPos;
-      LRPos = std::find(UnspilledCS1GPRs.begin(), UnspilledCS1GPRs.end(),
+      LRPos = find(UnspilledCS1GPRs, (unsigned)ARM::LR);
-                        (unsigned)ARM::LR);
       if (LRPos != UnspilledCS1GPRs.end())
         UnspilledCS1GPRs.erase(LRPos);
 
@@ -1651,8 +1650,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
 
     if (hasFP(MF)) {
       SavedRegs.set(FramePtr);
-      auto FPPos = std::find(UnspilledCS1GPRs.begin(), UnspilledCS1GPRs.end(),
+      auto FPPos = find(UnspilledCS1GPRs, FramePtr);
-                             FramePtr);
       if (FPPos != UnspilledCS1GPRs.end())
         UnspilledCS1GPRs.erase(FPPos);
       NumGPRSpills++;

llvm/lib/Target/ARM/ARMISelLowering.cpp

@@ -5915,7 +5915,7 @@ SDValue ARMTargetLowering::ReconstructShuffle(SDValue Op,
 
     // Add this element source to the list if it's not already there.
     SDValue SourceVec = V.getOperand(0);
-    auto Source = std::find(Sources.begin(), Sources.end(), SourceVec);
+    auto Source = find(Sources, SourceVec);
     if (Source == Sources.end())
       Source = Sources.insert(Sources.end(), ShuffleSourceInfo(SourceVec));
 
@@ -6031,7 +6031,7 @@ SDValue ARMTargetLowering::ReconstructShuffle(SDValue Op,
     if (Entry.isUndef())
       continue;
 
-    auto Src = std::find(Sources.begin(), Sources.end(), Entry.getOperand(0));
+    auto Src = find(Sources, Entry.getOperand(0));
     int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
 
     // EXTRACT_VECTOR_ELT performs an implicit any_ext; BUILD_VECTOR an implicit

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

@@ -834,7 +834,7 @@ MachineInstr *ARMLoadStoreOpt::MergeOpsUpdate(const MergeCandidate &Cand) {
         assert(MO.isImplicit());
         unsigned DefReg = MO.getReg();
 
-        if (std::find(ImpDefs.begin(), ImpDefs.end(), DefReg) != ImpDefs.end())
+        if (is_contained(ImpDefs, DefReg))
           continue;
         // We can ignore cases where the super-reg is read and written.
         if (MI->readsRegister(DefReg))

llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp

@@ -2665,7 +2665,7 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) {
           if (UseI->getOperand(Idx+1).getMBB() != C.LB)
             BadUse = true;
         } else {
-          auto F = std::find(ShufIns.begin(), ShufIns.end(), UseI);
+          auto F = find(ShufIns, UseI);
           if (F == ShufIns.end())
             BadUse = true;
         }

llvm/lib/Target/Hexagon/HexagonMachineScheduler.h

@@ -94,9 +94,7 @@ public:
   void savePacket();
   unsigned getTotalPackets() const { return TotalPackets; }
 
-  bool isInPacket(SUnit *SU) const {
+  bool isInPacket(SUnit *SU) const { return is_contained(Packet, SU); }
-    return std::find(Packet.begin(), Packet.end(), SU) != Packet.end();
-  }
 };
 
 /// Extend the standard ScheduleDAGMI to provide more context and override the

llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp

@@ -1338,7 +1338,7 @@ bool HexagonPacketizerList::isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) {
       // However, there is no dependence edge between (1)->(3). This results
       // in all 3 instructions going in the same packet. We ignore dependce
       // only once to avoid this situation.
-      auto Itr = std::find(IgnoreDepMIs.begin(), IgnoreDepMIs.end(), &J);
+      auto Itr = find(IgnoreDepMIs, &J);
       if (Itr != IgnoreDepMIs.end()) {
         Dependence = true;
         return false;

llvm/lib/Target/Mips/MipsConstantIslandPass.cpp

@@ -1374,7 +1374,7 @@ bool MipsConstantIslands::handleConstantPoolUser(unsigned CPUserIndex) {
     // it.  Check for this so it will be removed from the WaterList.
     // Also remove any entry from NewWaterList.
     MachineBasicBlock *WaterBB = &*--NewMBB->getIterator();
-    IP = std::find(WaterList.begin(), WaterList.end(), WaterBB);
+    IP = find(WaterList, WaterBB);
     if (IP != WaterList.end())
       NewWaterList.erase(WaterBB);
 

llvm/lib/Target/NVPTX/NVPTXUtilities.cpp

@@ -169,7 +169,7 @@ bool llvm::isSampler(const llvm::Value &val) {
     if (llvm::findAllNVVMAnnotation(
             func, llvm::PropertyAnnotationNames[llvm::PROPERTY_ISSAMPLER],
             annot)) {
-      if (std::find(annot.begin(), annot.end(), arg->getArgNo()) != annot.end())
+      if (is_contained(annot, arg->getArgNo()))
         return true;
     }
   }
@@ -184,7 +184,7 @@ bool llvm::isImageReadOnly(const llvm::Value &val) {
                                     llvm::PropertyAnnotationNames[
                                         llvm::PROPERTY_ISREADONLY_IMAGE_PARAM],
                                     annot)) {
-      if (std::find(annot.begin(), annot.end(), arg->getArgNo()) != annot.end())
+      if (is_contained(annot, arg->getArgNo()))
         return true;
     }
   }
@@ -199,7 +199,7 @@ bool llvm::isImageWriteOnly(const llvm::Value &val) {
                                     llvm::PropertyAnnotationNames[
                                         llvm::PROPERTY_ISWRITEONLY_IMAGE_PARAM],
                                     annot)) {
-      if (std::find(annot.begin(), annot.end(), arg->getArgNo()) != annot.end())
+      if (is_contained(annot, arg->getArgNo()))
         return true;
     }
   }
@@ -214,7 +214,7 @@ bool llvm::isImageReadWrite(const llvm::Value &val) {
                                     llvm::PropertyAnnotationNames[
                                         llvm::PROPERTY_ISREADWRITE_IMAGE_PARAM],
                                     annot)) {
-      if (std::find(annot.begin(), annot.end(), arg->getArgNo()) != annot.end())
+      if (is_contained(annot, arg->getArgNo()))
         return true;
     }
   }

llvm/lib/Target/Sparc/LeonPasses.cpp

@@ -51,8 +51,7 @@ int LEONMachineFunctionPass::GetRegIndexForOperand(MachineInstr &MI,
 int LEONMachineFunctionPass::getUnusedFPRegister(MachineRegisterInfo &MRI) {
   for (int RegisterIndex = SP::F0; RegisterIndex <= SP::F31; ++RegisterIndex) {
     if (!MRI.isPhysRegUsed(RegisterIndex) &&
-        !(std::find(UsedRegisters.begin(), UsedRegisters.end(),
+        !is_contained(UsedRegisters, RegisterIndex)) {
-                    RegisterIndex) != UsedRegisters.end())) {
       return RegisterIndex;
     }
   }

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -9553,18 +9553,15 @@ static SDValue lowerV8I16GeneralSingleInputVectorShuffle(
         auto FixFlippedInputs = [&V, &DL, &Mask, &DAG](int PinnedIdx, int DWord,
                                                        ArrayRef<int> Inputs) {
           int FixIdx = PinnedIdx ^ 1; // The adjacent slot to the pinned slot.
-          bool IsFixIdxInput = std::find(Inputs.begin(), Inputs.end(),
+          bool IsFixIdxInput = is_contained(Inputs, PinnedIdx ^ 1);
-                                         PinnedIdx ^ 1) != Inputs.end();
           // Determine whether the free index is in the flipped dword or the
           // unflipped dword based on where the pinned index is. We use this bit
           // in an xor to conditionally select the adjacent dword.
           int FixFreeIdx = 2 * (DWord ^ (PinnedIdx / 2 == DWord));
-          bool IsFixFreeIdxInput = std::find(Inputs.begin(), Inputs.end(),
+          bool IsFixFreeIdxInput = is_contained(Inputs, FixFreeIdx);
-                                             FixFreeIdx) != Inputs.end();
           if (IsFixIdxInput == IsFixFreeIdxInput)
             FixFreeIdx += 1;
-          IsFixFreeIdxInput = std::find(Inputs.begin(), Inputs.end(),
+          IsFixFreeIdxInput = is_contained(Inputs, FixFreeIdx);
-                                        FixFreeIdx) != Inputs.end();
           assert(IsFixIdxInput != IsFixFreeIdxInput &&
                  "We need to be changing the number of flipped inputs!");
           int PSHUFHalfMask[] = {0, 1, 2, 3};

llvm/lib/Transforms/Scalar/JumpThreading.cpp

@@ -1167,8 +1167,7 @@ FindMostPopularDest(BasicBlock *BB,
     for (unsigned i = 0; ; ++i) {
       assert(i != TI->getNumSuccessors() && "Didn't find any successor!");
 
-      if (std::find(SamePopularity.begin(), SamePopularity.end(),
+      if (!is_contained(SamePopularity, TI->getSuccessor(i)))
-                    TI->getSuccessor(i)) == SamePopularity.end())
         continue;
 
       MostPopularDest = TI->getSuccessor(i);

llvm/lib/Transforms/Scalar/LoopRerollPass.cpp

@@ -878,7 +878,7 @@ findRootsRecursive(Instruction *I, SmallInstructionSet SubsumedInsts) {
 
   for (User *V : I->users()) {
     Instruction *I = dyn_cast<Instruction>(V);
-    if (std::find(LoopIncs.begin(), LoopIncs.end(), I) != LoopIncs.end())
+    if (is_contained(LoopIncs, I))
       continue;
 
     if (!I || !isSimpleArithmeticOp(I) ||
@@ -1088,7 +1088,7 @@ bool LoopReroll::DAGRootTracker::isBaseInst(Instruction *I) {
 
 bool LoopReroll::DAGRootTracker::isRootInst(Instruction *I) {
   for (auto &DRS : RootSets) {
-    if (std::find(DRS.Roots.begin(), DRS.Roots.end(), I) != DRS.Roots.end())
+    if (is_contained(DRS.Roots, I))
       return true;
   }
   return false;

llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp

@@ -448,8 +448,7 @@ void Formula::deleteBaseReg(const SCEV *&S) {
 
 /// Test if this formula references the given register.
 bool Formula::referencesReg(const SCEV *S) const {
-  return S == ScaledReg ||
+  return S == ScaledReg || is_contained(BaseRegs, S);
-         std::find(BaseRegs.begin(), BaseRegs.end(), S) != BaseRegs.end();
 }
 
 /// Test whether this formula uses registers which are used by uses other than
@@ -4231,8 +4230,7 @@ void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
     int NumReqRegsToFind = std::min(F.getNumRegs(), ReqRegs.size());
     for (const SCEV *Reg : ReqRegs) {
       if ((F.ScaledReg && F.ScaledReg == Reg) ||
-          std::find(F.BaseRegs.begin(), F.BaseRegs.end(), Reg) !=
+          is_contained(F.BaseRegs, Reg)) {
-          F.BaseRegs.end()) {
         --NumReqRegsToFind;
         if (NumReqRegsToFind == 0)
           break;

llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp

@@ -1154,7 +1154,7 @@ static void CreateGCRelocates(ArrayRef<Value *> LiveVariables,
     return;
 
   auto FindIndex = [](ArrayRef<Value *> LiveVec, Value *Val) {
-    auto ValIt = std::find(LiveVec.begin(), LiveVec.end(), Val);
+    auto ValIt = find(LiveVec, Val);
     assert(ValIt != LiveVec.end() && "Val not found in LiveVec!");
     size_t Index = std::distance(LiveVec.begin(), ValIt);
     assert(Index < LiveVec.size() && "Bug in std::find?");
@@ -1929,8 +1929,7 @@ static void rematerializeLiveValues(CallSite CS,
           // Assert that cloned instruction does not use any instructions from
           // this chain other than LastClonedValue
           for (auto OpValue : ClonedValue->operand_values()) {
-            assert(std::find(ChainToBase.begin(), ChainToBase.end(), OpValue) ==
+            assert(!is_contained(ChainToBase, OpValue) &&
-                       ChainToBase.end() &&
                    "incorrect use in rematerialization chain");
           }
 #endif

llvm/lib/Transforms/Scalar/StructurizeCFG.cpp

@@ -321,7 +321,7 @@ void StructurizeCFG::orderNodes() {
     BasicBlock *BB = (*I)->getEntry();
     unsigned LoopDepth = LI->getLoopDepth(BB);
 
-    if (std::find(Order.begin(), Order.end(), *I) != Order.end())
+    if (is_contained(Order, *I))
       continue;
 
     if (LoopDepth < CurrentLoopDepth) {

llvm/lib/Transforms/Utils/Evaluator.cpp

@@ -537,7 +537,7 @@ bool Evaluator::EvaluateFunction(Function *F, Constant *&RetVal,
                                  const SmallVectorImpl<Constant*> &ActualArgs) {
   // Check to see if this function is already executing (recursion).  If so,
   // bail out.  TODO: we might want to accept limited recursion.
-  if (std::find(CallStack.begin(), CallStack.end(), F) != CallStack.end())
+  if (is_contained(CallStack, F))
     return false;
 
   CallStack.push_back(F);

llvm/lib/Transforms/Utils/LCSSA.cpp

@@ -54,7 +54,7 @@ STATISTIC(NumLCSSA, "Number of live out of a loop variables");
 /// Return true if the specified block is in the list.
 static bool isExitBlock(BasicBlock *BB,
                         const SmallVectorImpl<BasicBlock *> &ExitBlocks) {
-  return find(ExitBlocks, BB) != ExitBlocks.end();
+  return is_contained(ExitBlocks, BB);
 }
 
 /// For every instruction from the worklist, check to see if it has any uses

llvm/lib/Transforms/Utils/SSAUpdater.cpp

@@ -482,5 +482,5 @@ bool
 LoadAndStorePromoter::isInstInList(Instruction *I,
                                    const SmallVectorImpl<Instruction*> &Insts)
                                    const {
-  return std::find(Insts.begin(), Insts.end(), I) != Insts.end();
+  return is_contained(Insts, I);
 }

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

@@ -954,8 +954,7 @@ void BoUpSLP::buildTree(ArrayRef<Value *> Roots,
         }
 
         // Ignore users in the user ignore list.
-        if (std::find(UserIgnoreList.begin(), UserIgnoreList.end(), UserInst) !=
+        if (is_contained(UserIgnoreList, UserInst))
-            UserIgnoreList.end())
           continue;
 
         DEBUG(dbgs() << "SLP: Need to extract:" << *U << " from lane " <<
@@ -2726,8 +2725,7 @@ Value *BoUpSLP::vectorizeTree() {
 
           assert((ScalarToTreeEntry.count(U) ||
                   // It is legal to replace users in the ignorelist by undef.
-                  (std::find(UserIgnoreList.begin(), UserIgnoreList.end(), U) !=
+                  is_contained(UserIgnoreList, U)) &&
-                   UserIgnoreList.end())) &&
                  "Replacing out-of-tree value with undef");
         }
 #endif
@@ -2820,7 +2818,7 @@ void BoUpSLP::optimizeGatherSequence() {
         }
       }
       if (In) {
-        assert(std::find(Visited.begin(), Visited.end(), In) == Visited.end());
+        assert(!is_contained(Visited, In));
         Visited.push_back(In);
       }
     }

llvm/tools/bugpoint/CrashDebugger.cpp

@@ -239,9 +239,7 @@ static void RemoveFunctionReferences(Module *M, const char* Name) {
 
 bool ReduceCrashingFunctions::TestFuncs(std::vector<Function*> &Funcs) {
   // If main isn't present, claim there is no problem.
-  if (KeepMain && std::find(Funcs.begin(), Funcs.end(),
+  if (KeepMain && !is_contained(Funcs, BD.getProgram()->getFunction("main")))
-                            BD.getProgram()->getFunction("main")) ==
-                      Funcs.end())
     return false;
 
   // Clone the program to try hacking it apart...

llvm/tools/dsymutil/MachODebugMapParser.cpp

@@ -285,20 +285,17 @@ void MachODebugMapParser::dumpOneBinaryStab(const MachOObjectFile &MainBinary,
 }
 
 static bool shouldLinkArch(SmallVectorImpl<StringRef> &Archs, StringRef Arch) {
-  if (Archs.empty() ||
+  if (Archs.empty() || is_contained(Archs, "all") || is_contained(Archs, "*"))
-      std::find(Archs.begin(), Archs.end(), "all") != Archs.end() ||
-      std::find(Archs.begin(), Archs.end(), "*") != Archs.end())
     return true;
 
-  if (Arch.startswith("arm") && Arch != "arm64" &&
+  if (Arch.startswith("arm") && Arch != "arm64" && is_contained(Archs, "arm"))
-      std::find(Archs.begin(), Archs.end(), "arm") != Archs.end())
     return true;
 
   SmallString<16> ArchName = Arch;
   if (Arch.startswith("thumb"))
     ArchName = ("arm" + Arch.substr(5)).str();
 
-  return std::find(Archs.begin(), Archs.end(), ArchName) != Archs.end();
+  return is_contained(Archs, ArchName);
 }
 
 bool MachODebugMapParser::dumpStab() {

llvm/tools/llvm-ar/llvm-ar.cpp

@@ -429,7 +429,7 @@ static void performReadOperation(ArchiveOperation Operation,
       StringRef Name = NameOrErr.get();
 
       if (Filter) {
-        auto I = std::find(Members.begin(), Members.end(), Name);
+        auto I = find(Members, Name);
         if (I == Members.end())
           continue;
         Members.erase(I);

llvm/unittests/ExecutionEngine/MCJIT/MCJITTestAPICommon.h

@@ -15,6 +15,7 @@
 #ifndef LLVM_UNITTESTS_EXECUTIONENGINE_MCJIT_MCJITTESTAPICOMMON_H
 #define LLVM_UNITTESTS_EXECUTIONENGINE_MCJIT_MCJITTESTAPICOMMON_H
 
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/IR/LegacyPassManager.h"
@@ -56,13 +57,11 @@ protected:
   bool ArchSupportsMCJIT() {
     Triple Host(HostTriple);
     // If ARCH is not supported, bail
-    if (std::find(SupportedArchs.begin(), SupportedArchs.end(), Host.getArch())
+    if (!is_contained(SupportedArchs, Host.getArch()))
-        == SupportedArchs.end())
       return false;
 
     // If ARCH is supported and has no specific sub-arch support
-    if (std::find(HasSubArchs.begin(), HasSubArchs.end(), Host.getArch())
+    if (!is_contained(HasSubArchs, Host.getArch()))
-        == HasSubArchs.end())
       return true;
 
     // If ARCH has sub-arch support, find it
@@ -78,12 +77,11 @@ protected:
   bool OSSupportsMCJIT() {
     Triple Host(HostTriple);
 
-    if (std::find(UnsupportedEnvironments.begin(), UnsupportedEnvironments.end(),
+    if (find(UnsupportedEnvironments, Host.getEnvironment()) !=
-                  Host.getEnvironment()) != UnsupportedEnvironments.end())
+        UnsupportedEnvironments.end())
       return false;
 
-    if (std::find(UnsupportedOSs.begin(), UnsupportedOSs.end(), Host.getOS())
+    if (!is_contained(UnsupportedOSs, Host.getOS()))
-        == UnsupportedOSs.end())
       return true;
 
     return false;

llvm/unittests/Support/Path.cpp

@@ -8,6 +8,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Support/Path.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/ConvertUTF.h"
 #include "llvm/Support/Errc.h"
 #include "llvm/Support/ErrorHandling.h"
@@ -677,16 +678,15 @@ TEST_F(FileSystemTest, DirectoryIteration) {
       i.no_push();
     visited.push_back(path::filename(i->path()));
   }
-  v_t::const_iterator a0 = std::find(visited.begin(), visited.end(), "a0");
+  v_t::const_iterator a0 = find(visited, "a0");
-  v_t::const_iterator aa1 = std::find(visited.begin(), visited.end(), "aa1");
+  v_t::const_iterator aa1 = find(visited, "aa1");
-  v_t::const_iterator ab1 = std::find(visited.begin(), visited.end(), "ab1");
+  v_t::const_iterator ab1 = find(visited, "ab1");
-  v_t::const_iterator dontlookhere = std::find(visited.begin(), visited.end(),
+  v_t::const_iterator dontlookhere = find(visited, "dontlookhere");
-                                               "dontlookhere");
+  v_t::const_iterator da1 = find(visited, "da1");
-  v_t::const_iterator da1 = std::find(visited.begin(), visited.end(), "da1");
+  v_t::const_iterator z0 = find(visited, "z0");
-  v_t::const_iterator z0 = std::find(visited.begin(), visited.end(), "z0");
+  v_t::const_iterator za1 = find(visited, "za1");
-  v_t::const_iterator za1 = std::find(visited.begin(), visited.end(), "za1");
+  v_t::const_iterator pop = find(visited, "pop");
-  v_t::const_iterator pop = std::find(visited.begin(), visited.end(), "pop");
+  v_t::const_iterator p1 = find(visited, "p1");
-  v_t::const_iterator p1 = std::find(visited.begin(), visited.end(), "p1");
 
   // Make sure that each path was visited correctly.
   ASSERT_NE(a0, visited.end());

llvm/unittests/Support/ThreadPool.cpp

@@ -31,16 +31,14 @@ protected:
   bool isUnsupportedOSOrEnvironment() {
     Triple Host(Triple::normalize(sys::getProcessTriple()));
 
-    if (std::find(UnsupportedEnvironments.begin(), UnsupportedEnvironments.end(),
+    if (find(UnsupportedEnvironments, Host.getEnvironment()) !=
-                  Host.getEnvironment()) != UnsupportedEnvironments.end())
+        UnsupportedEnvironments.end())
       return true;
 
-    if (std::find(UnsupportedOSs.begin(), UnsupportedOSs.end(), Host.getOS())
+    if (is_contained(UnsupportedOSs, Host.getOS()))
-        != UnsupportedOSs.end())
       return true;
 
-    if (std::find(UnsupportedArchs.begin(), UnsupportedArchs.end(), Host.getArch())
+    if (is_contained(UnsupportedArchs, Host.getArch()))
-        != UnsupportedArchs.end())
       return true;
 
     return false;

llvm/utils/TableGen/AsmMatcherEmitter.cpp

@@ -1819,8 +1819,7 @@ static unsigned getConverterOperandID(const std::string &Name,
                                       bool &IsNew) {
   IsNew = Table.insert(Name);
 
-  unsigned ID = IsNew ? Table.size() - 1 :
+  unsigned ID = IsNew ? Table.size() - 1 : find(Table, Name) - Table.begin();
-    std::find(Table.begin(), Table.end(), Name) - Table.begin();
 
   assert(ID < Table.size());
 

llvm/utils/TableGen/CodeGenDAGPatterns.h

@@ -412,8 +412,7 @@ public:
   }
   void addPredicateFn(const TreePredicateFn &Fn) {
     assert(!Fn.isAlwaysTrue() && "Empty predicate string!");
-    if (std::find(PredicateFns.begin(), PredicateFns.end(), Fn) ==
+    if (!is_contained(PredicateFns, Fn))
-          PredicateFns.end())
       PredicateFns.push_back(Fn);
   }
 

llvm/utils/TableGen/CodeGenRegisters.cpp

@@ -1756,8 +1756,7 @@ void CodeGenRegBank::computeRegUnitSets() {
     std::vector<unsigned> RUSets;
     for (unsigned i = 0, e = RegUnitSets.size(); i != e; ++i) {
       RegUnitSet &RUSet = RegUnitSets[i];
-      if (std::find(RUSet.Units.begin(), RUSet.Units.end(), UnitIdx)
+      if (!is_contained(RUSet.Units, UnitIdx))
-          == RUSet.Units.end())
         continue;
       RUSets.push_back(i);
     }

llvm/utils/TableGen/CodeGenSchedule.cpp

@@ -356,8 +356,7 @@ bool CodeGenSchedModels::hasReadOfWrite(Record *WriteDef) const {
       continue;
 
     RecVec ValidWrites = ReadDef->getValueAsListOfDefs("ValidWrites");
-    if (std::find(ValidWrites.begin(), ValidWrites.end(), WriteDef)
+    if (is_contained(ValidWrites, WriteDef)) {
-        != ValidWrites.end()) {
       return true;
     }
   }
@@ -1400,8 +1399,7 @@ bool CodeGenSchedModels::hasSuperGroup(RecVec &SubUnits, CodeGenProcModel &PM) {
       PM.ProcResourceDefs[i]->getValueAsListOfDefs("Resources");
     RecIter RI = SubUnits.begin(), RE = SubUnits.end();
     for ( ; RI != RE; ++RI) {
-      if (std::find(SuperUnits.begin(), SuperUnits.end(), *RI)
+      if (!is_contained(SuperUnits, *RI)) {
-          == SuperUnits.end()) {
         break;
       }
     }
@@ -1741,7 +1739,7 @@ void CodeGenSchedModels::addWriteRes(Record *ProcWriteResDef, unsigned PIdx) {
   assert(PIdx && "don't add resources to an invalid Processor model");
 
   RecVec &WRDefs = ProcModels[PIdx].WriteResDefs;
-  RecIter WRI = std::find(WRDefs.begin(), WRDefs.end(), ProcWriteResDef);
+  RecIter WRI = find(WRDefs, ProcWriteResDef);
   if (WRI != WRDefs.end())
     return;
   WRDefs.push_back(ProcWriteResDef);
@@ -1758,15 +1756,14 @@ void CodeGenSchedModels::addWriteRes(Record *ProcWriteResDef, unsigned PIdx) {
 void CodeGenSchedModels::addReadAdvance(Record *ProcReadAdvanceDef,
                                         unsigned PIdx) {
   RecVec &RADefs = ProcModels[PIdx].ReadAdvanceDefs;
-  RecIter I = std::find(RADefs.begin(), RADefs.end(), ProcReadAdvanceDef);
+  RecIter I = find(RADefs, ProcReadAdvanceDef);
   if (I != RADefs.end())
     return;
   RADefs.push_back(ProcReadAdvanceDef);
 }
 
 unsigned CodeGenProcModel::getProcResourceIdx(Record *PRDef) const {
-  RecIter PRPos = std::find(ProcResourceDefs.begin(), ProcResourceDefs.end(),
+  RecIter PRPos = find(ProcResourceDefs, PRDef);
-                            PRDef);
   if (PRPos == ProcResourceDefs.end())
     PrintFatalError(PRDef->getLoc(), "ProcResource def is not included in "
                     "the ProcResources list for " + ModelName);

llvm/utils/TableGen/CodeGenTarget.h

@@ -139,7 +139,7 @@ public:
   /// supported by the target (i.e. there are registers that directly hold it).
   bool isLegalValueType(MVT::SimpleValueType VT) const {
     ArrayRef<MVT::SimpleValueType> LegalVTs = getLegalValueTypes();
-    return std::find(LegalVTs.begin(), LegalVTs.end(), VT) != LegalVTs.end();
+    return is_contained(LegalVTs, VT);
   }
 
   CodeGenSchedModels &getSchedModels() const;

llvm/utils/TableGen/SubtargetEmitter.cpp

@@ -783,8 +783,7 @@ void SubtargetEmitter::ExpandProcResources(RecVec &PRVec,
       RecVec SuperResources = PR->getValueAsListOfDefs("Resources");
       RecIter SubI = SubResources.begin(), SubE = SubResources.end();
       for( ; SubI != SubE; ++SubI) {
-        if (std::find(SuperResources.begin(), SuperResources.end(), *SubI)
+        if (!is_contained(SuperResources, *SubI)) {
-            == SuperResources.end()) {
           break;
         }
       }
@@ -873,8 +872,7 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
       // Check this processor's itinerary class resources.
       for (Record *I : ProcModel.ItinRWDefs) {
         RecVec Matched = I->getValueAsListOfDefs("MatchedItinClasses");
-        if (std::find(Matched.begin(), Matched.end(), SC.ItinClassDef)
+        if (is_contained(Matched, SC.ItinClassDef)) {
-            != Matched.end()) {
           SchedModels.findRWs(I->getValueAsListOfDefs("OperandReadWrites"),
                               Writes, Reads);
           break;